A290021TL-70 AMIC Technology Corporation, A290021TL-70 Datasheet
A290021TL-70
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A290021TL-70 Summary of contents
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Document Title 256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory Revision History Rev. No. History 0.0 Initial issue 0.1 Add A290021 part data 0.2 Add Top/Bottom ordering information 0.3 Change I from 50µA to 100µA LIT Change ...
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Features 5.0V ± 10% for read and write operations Access times: - 55/70/90/120/150 (max.) Current typical active read current - 30 mA typical program/erase current - 1 µA typical CMOS standby Flexible sector architecture - 16 Kbyte/ ...
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The hardware sector protection feature disables operations for both program and erase in any combination of the sectors of memory. This can be achieved via programming equipment. The Erase Suspend feature enables the user to put erase on hold for ...
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Block Diagram VCC VSS State WE Control RESET (N/A A290021) Command Register CE OE VCC Detector A0-A17 Pin Descriptions (August, 2004, Version 1.3) Erase Voltage Generator PGM Voltage Generator Timer Pin No A17 Address Inputs I/O - I/O ...
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Absolute Maximum Ratings* Ambient Operating Temperature . . . …... .-55° 125°C Storage Temperature . . . . . . . … …… -65° 125°C Ground to VCC . . . . . ...
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Requirements for Reading Array Data To read array data from the outputs, the system must drive the CE and OE pins selects the device the output control and gates array data to the ...
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Table 2. A29002/A290021 Top Boot Block Sector Address Table Sector A17 A16 SA0 0 0 SA1 0 1 SA2 1 0 SA3 1 1 SA4 1 1 SA5 1 1 SA6 1 1 Table 3. A29002/A290021 Bottom Boot Block Sector ...
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Sector Protection/Unprotection The hardware sector protection feature disables both program and erase operations in any sector. The hardware sector unprotection feature re-enables both program and erase operations in previously protected sectors. Sector protection/unprotection must be implemented using programming equipment. The ...
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Command Definitions Writing specific address and data commands or sequences into the command register initiates device operations. The Command Definitions table defines the valid register command sequences. Writing incorrect address and data values or writing them in the improper sequence ...
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START Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data ? Increment Address Last Address ? Programming Completed Note : See the appropriate Command Definitions table for program command sequence. Figure 2. Program Operation ...
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Addresses are "don't cares" when writing the Erase Suspend command. When the Erase Suspend command is written during a sector erase operation, the device requires a maximum of 20µs to suspend the erase operation. However, when the Erase Suspend ...
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Command Sequence (Note 1) Read (Note 5) Reset (Note 6) Autoselect Manufacturer ID (Note 7) Device ID Top Bottom Continuation ID Sector Protect Verify (Note 8) Program Chip Erase Sector Erase Erase Suspend (Note 9) Erase Resume (Note 10) Legend: ...
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Write Operation Status Several bits, I/O , I/O , I/O , I/O , and I the A29002/A290021 to determine the status of a write operation. Table 6 and the following subsections describe the functions of these ...
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I/O : Toggle Bit I 6 Toggle Bit I on I/O indicates whether an Embedded 6 Program or Erase algorithm is in progress or complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be ...
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After the sector erase command sequence is written, the system should read the status on I/O I/O (Toggle Bit 1) to ensure the device has accepted the 6 command sequence, and then read I/O internally controlled erase cycle has begun; ...
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Operation Standard Embedded Program Algorithm Mode Embedded Erase Algorithm Erase Reading within Erase Suspend Suspended Sector Mode Reading within Non-Erase Suspend Sector Erase-Suspend-Program Notes: 1. I/O and I/O require a valid address when reading status information. Refer to the appropriate ...
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DC Characteristics TTL/NMOS Compatible Parameter Parameter Description Symbol I Input Load Current LI I Input Load Current VCC = VCC Max, LIT A9, OE & RESET I Output Leakage Current LO I VCC Active Read Current CC1 (Notes 1, 2) ...
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AC Characteristics Read Only Operations Parameter Symbols JEDEC Std Read Cycle Time (Note AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to ...
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Hardware Reset ( RESET (N/A on A290021) ) Parameter JEDEC Std t READY RESET Pin Low (During Embedded Algorithms) to Read or Write (See Note) t READY RESET Pin Low (Not During Embedded Algorithms) to Read or Write (See Note) ...
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AC Characteristics Erase and Program Operations Parameter Symbols JEDEC Std t t Write Cycle Time (Note 1) AVAV WC Address Setup Time t t AVWL AS Address Hold Time t t WLAX AH Data Setup Time t t DVWH DS ...
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Timing Waveforms for Program Operation Program Command Sequence (last two cycles Addresses 555h CE t GHWL Data t VCS VCC Note : PA = program addrss program data, Dout is the true ...
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Timing Waveforms for Chip/Sector Erase Operation Erase Command Sequence (last two cycles Addresses 2AAh CE t GHWL Data t VCS VCC Note : SA = Sector Address Valid Address for reading status ...
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Timing Waveforms for Data Polling (During Embedded Algorithms Addresses VA t ACC OEH WE I/O 7 I Note : VA = Valid Address. Illustation shows first status ...
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Timing Waveforms for Toggle Bit (During Embedded Algorithms Addresses VA t ACC OEH WE I Note Valid Address; not required for I/O read cycle, and ...
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Timing Waveforms for I/O vs. I/O 2 Enter Erase Embedded Suspend Erasing WE Erase I/O 6 I/O 2 I/O and I/O 2 Note : Both I/O and I/O toggle with OE or CE. See the text on I ...
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Timing Waveforms for Alternate CE Controlled Write Operation ( RESET 555 for program 2AA for erase Addresses GHEL Data for program 55 for erase Note : ...
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Latch-up Characteristics Input Voltage with respect to VSS on all I/O pins VCC Current Input voltage with respect to VSS on all pins except I/O pins (including A9, OE and RESET ) Includes all pins except VCC. Test conditions: VCC ...
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Test Conditions Test Specifications Test Condition Output Load Output Load Capacitance, C (including jig capacitance) L Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels Test Setup Device Under Test (August, ...
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... A290021T-55 A29002T-55F A290021T-55F A29002TL-55 A290021TL-55 55 A29002TL-55F A290021TL-55F A29002TV-55 A290021TV-55 A29002TV-55F A290021TV-55F A29002T-70 A290021T-70 A29002T-70F A290021T-70F A29002TL-70 A290021TL-70 70 A29002TL-70F A290021TL-70F A29002TV-70 A290021TV-70 A29002TV-70F A290021TV-70F A29002T-90 A290021T-90 A29002T-90F A290021T-90F A29002TL-90 A290021TL-90 90 A29002TL-90F A290021TL-90F A29002TV-90 A290021TV-90 A29002TV-90F A290021TV-90F (August, 2004, Version 1.3) Active Read Program/Erase ...
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... A29002T-120F A290021T-120F A29002TL-120 A290021TL-120 120 A29002TL-120F A290021TL-120F A29002TV-120 A290021TV-120 A29002TV-120F A290021TV-120F A29002T-150 A290021T-150 A29002T-150F A290021T-150F A29002TL-150 A290021TL-150 150 A29002TL-150F A290021TL-150F A29002TV-150 A290021TV-150 A29002TV-150F A290021TV-150F (August, 2004, Version 1.3) Active Read Program/Erase Current Current Typ. (mA) Typ. (mA A29002/A290021 Series Standby Current Package Typ. (µ ...
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Ordering Information (continued) Bottom Boot Sector Flash Part No. Access Time (ns) A29002U-55 A290021U-55 A29002U-55F A290021U-55F A29002UL-55 A290021UL-55 55 A29002UL-55F A290021UL-55F A29002UV-55 A290021UV-55 A29002UV-55F A290021UV-55F A29002U-70 A290021U-70 A29002U-70F A290021U-70F A29002UL-70 A290021UL-70 70 A29002UL-70F A290021UL-70F A29002UV-70 A290021UV-70 A29002UV-70F A290021UV-70F A29002U-90 A290021U-90 ...
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Ordering Information (continued) Bottom Boot Sector Flash Part No. Access Time (ns) A29002U-120 A290021U-120 A29002U-120F A290021U-120F A29002UL-120 A290021UL-120 120 A29002UL-120F A290021UL-120F A29002UV-120 A290021UV-120 A29002UV-120F A290021UV-120F A29002U-150 A290021U-150 A29002U-150F A290021U-150F A29002UL-150 A290021UL-150 150 A29002UL-150F A290021UL-150F A29002UV-150 A290021UV-150 A29002UV-150F A290021UV-150F (August, 2004, ...
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Package Information P-DIP 32L Outline Dimensions Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. (August, 2004, Version 1. Base Plane Seating ...
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Package Information PLCC 32L Outline Dimension Symbol Notes: 1. Dimensions D and E do not include resin fins. 2. Dimensions G (August, 2004, Version 1. ...
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Package Information TSOP 32L TYPE 20mm) Outline Dimensions y Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. (August, 2004, Version ...