ATmega329P Atmel Corporation, ATmega329P Datasheet - Page 18

• Manufacturer Part Number: ATmega329P
• Manufacturer: Atmel Corporation

Specifications of ATmega329P

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 17
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7. AVR Memories
7.1
7.2
7.3
8021G–AVR–03/11
Overview
In-System Reprogrammable Flash Program Memory
SRAM Data Memory
This section describes the different memories in the ATmega329P/3290P. The Atmel
architecture has two main memory spaces, the Data Memory and the Program Memory space.
In addition, the ATmega329P/3290P features an EEPROM Memory for data storage. All three
memory spaces are linear.
The ATmega329P/3290P contains 132Kbytes On-chip In-System Reprogrammable Flash mem-
ory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized
as 16K x 16 (ATmega329P/3290P). For software security, the Flash Program memory space is
divided into two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega329P/3290P Program Counter (PC) is 14 bits wide, thus addressing the 16K program
memory locations. The operation of Boot Program section and associated Boot Lock bits for
software protection are described in detail in
gramming” on page
on Flash data serial downloading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 7-1.
Figure 7-2
shows how the SRAM Memory is organized.
15.
Program Memory Map
281.
”Memory Programming” on page 296
Application Flash Section
Boot Flash Section
Program Memory
”Boot Loader Support – Read-While-Write Self-Pro-
ATmega329P/3290P
0x0000
0x3FFF
contains a detailed description
”Instruction Execution Tim-
®
AVR
18
®