ATxmega256A3B Atmel Corporation, ATxmega256A3B Datasheet - Page 132

• Manufacturer Part Number: ATxmega256A3B
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3B

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Speed: No
• Usb Interface: No
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.4.1.2
13.4.2
13.4.3
8077H–AVR–12/09
Bus-keeper
Wired-OR
Totem-pole with Pull-up
In this mode, the configuration is as for Totem-pole, expect the pin is configured with internal
pull-up when set as input.
Figure 13-4. I/O pin configuration - Totem-pole with pull-up (on input).
When the pin is configured for bus-keeper, it provides a weak bus-keeper that will keep the pin
at its logic level when the pin is no longer driven to any logic state. If last level on the pin/bus was
1, the bus-keeper will use the internal pull resistor to keep the bus high. If last logic level on the
pin/bus was 0, the bus-keeper will use the internal pull resistor to keep the bus high.
The bus-keeper’s week output produces the same logical level as the last output level. It acts as
a pull-up if the last level was '1', and pull-down if the last level was '0'.
Figure 13-5. I/O pin configuration - Totem-pole with bus-keeper
With Wired-OR configuration, the pin will be driven high when the corresponding bit in OUT is
written to one. When OUT is set to zero, the pin is released allowing the pin to be pulled low with
the internal or an external pull-resistor. If internal pull-down is used, this is also active if the pin is
set as input.
OUTn
OUTn
DIRn
DIRn
INn
INn
Pn
Pn
XMEGA A
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