ATxmega256A3B Atmel Corporation, ATxmega256A3B Datasheet - Page 309

• Manufacturer Part Number: ATxmega256A3B
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3B

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Speed: No
• Usb Interface: No
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.16.13 CMPL - ADC Compare register Low
25.17 Register Description - ADC Channel
25.17.1
8077H–AVR–12/09
CTRL - ADC Channel Control Register
• Bits 7:0 - CMP[15:0]: ADC Compare value high byte
These are the 8 MSB of the 16-bit ADC compare value. In signed mode, the number representa-
tion is 2's complement and the MSB is the sign bit.
• Bits 7:0 - CMP[7:0]: ADC compare value high byte
These are the 8 LSB of the 16-bit ADC compare value. In signed mode, the number representa-
tion is 2's complement.
• Bit 7 - START: START Conversion on Channel
Writing this to one will start a conversion on the channel. The bit is cleared by hardware when
the conversion has started. Setting this bit when it already is set will have no effect. Writing or
reading these bits is equivalent to writing the CH[3:0]START bits in
ister A” on page
• Bits 6:5 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bits 4:3 - GAIN[2:0]: ADC Gain Factor
These bits define the gain factor in order to amplify input signals before ADC conversion.
Bit
+0x18
Read/Write
Initial Value
Bit
+0x19
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
START
R/W
7
0
R/W
R/W
7
0
7
0
302.
R
R/W
6
0
R/W
-
6
0
6
0
R/W
R
R/W
5
0
-
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
CMP[15:0]
CMP[7:0]
GAIN[2:0}
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
”CTRLA - ADC Control Reg-
R/W
R/W
R/W
INPUTMODE[1:0]
1
0
1
0
1
0
XMEGA A
R/W
R/W
R/W
0
0
0
0
0
0
CMPH
CMPL
CTRL
309