SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 890

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

890
Doc. Rev.
6289C
Doc. Rev.
6289B
AT91SAM9R64/RL64
Comments
Product Overview:
“Features”,
Figure 8-1 “AT91SAM9R64/RL64 Memory
Table 7-2, “List of Bus Matrix
3 updated.
Section 5.1 “Power
Section 5.1.1 “USB Power Supply Considerations”
Section 5.2 “Power
Table 3-1, “Signal Description
SHDN comments updated.
Table 10-3
Comments (Continued)
LCDC:
Section 39.5.2.3 “FIFO”
that it is in words.
words.
Electrical Characteristics:
Table 44-2, “DC
Table 44-4, “Power Consumption by Peripheral in Active Mode on
figure for LCDC.
Section 44.7 “Power Supply
characteristics.
Table 44-9, “XIN Clock Electrical
Removed EMAC section, former Section 44.8.7.
Table 44-23, “Master Clock Waveform
STH corner.
Table 44-24, “I/O
Section 44.8.9
Table 46-1, “AT91SAM9R64/RL64 Ordering Information”
Errata:
Section 47.2.3
Section 47.2.3.2 “LCD Periodic Bad Pixels”
Section 47.2.4.2 “MCI: SDIO Interrupt does not work with slots other than A when 1-bit databus is
selected”, corrected errata description.
Section 47.2.5.1 “RSTC: Reset during SDRAM
Section 47.2.8.1 “SHDN Signal may be Driven to Low Level Voltage During Device
errata.
Section 47.2.9.1 “SMC: Chip Select Parameters
and
“Debug Unit (DBGU)” on page
Table 10-7
“MCI”, all new and updated information on MMC and SD Card timings.
“LCD”, added section with errata
Characteristics”, updated I
Characteristics”, corrected MAX value of FreqMax.
Supplies”, updated with caution on VDDCORE and VDDIO constraints.
Consumption”, first two sentences updated.
Section 39.11.7 “DMA Frame Configuration
and
PB8, PB9 , Peripheral A column: typos corrected, “CFCE1,” “CFCE2”.
Slaves”,
List”, additional comments on BMS.
Section 39.11.15 “LCD FIFO
Characteristics”, all new and updated information on power supply
Characteristics”, added data on VIN and VIN32.
Table 7-3, “AT91SAM9R64/RL64 Master to Slave
Parameters”, corrected MAX value of Master Clock Frequency,
2, updated
Mapping”, Internal Memory Mapping updated.
SC
and
values
Accesses”, added errata.
Section 47.2.3.1 “LCD Screen Shifting After a
Section 47.2.3.3 “24-bit Packed Mode”
Modification”, added errata.
and
Figure 5-1
updated with MRL information.
Register”, updated FIFO size and specified
Register”, specified burst length is in
added to datasheet.
VDDCORE”, updated consumption
Power-on”, added
Access”, Slave
Reset”,
6289D–ATARM–3-Oct-11
Change
Request
Ref.
5846
5276
5291
5420
5388
5423
rfo
5788
Change
Request
Ref.
RFO
6268
5902
6269
6166
6184
RFO
RFO
6344
RFO
6382
6169
6082
6345
5642