SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 205

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SAM9XE512

Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9XE512

Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
23.8.2.2
6254C–ATARM–22-Jan-10
Read is Controlled by NCS (READ_MODE = 0)
Figure 23-10. READ_MODE = 1: Data is sampled by SMC before the rising edge of NRD
Figure 23-11
the falling edge of the NCS signal and remains valid until the rising edge of NCS. Data must be
sampled when NCS is raised. In that case, the READ_MODE must be set to 0 (read is controlled
by NCS): the SMC internally samples the data on the rising edge of Master Clock that generates
the rising edge of NCS, whatever the programmed waveform of NRD may be.
Figure 23-11. READ_MODE = 0: Data is sampled by SMC before the rising edge of NCS
NBS0,NBS1,
NBS2,NBS3,
A0, A1
NBS0,NBS1,
NBS2,NBS3,
A0, A1
D[31:0]
A[25:2]
D[31:0]
A[25:2]
MCK
MCK
NRD
NCS
NRD
NCS
shows the typical read cycle of an LCD module. The read data is valid t
AT91SAM9XE128/256/512 Preliminary
t
t
PACC
PACC
Data Sampling
Data Sampling
PACC
after
205

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