SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 66

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

12.6.4
12.6.4.1
66
AT91SAM9XE128/256/512 Preliminary
IEEE 1149.1 JTAG Boundary Scan
JTAG Boundary-scan Register
IEEE 1149.1 JTAG Boundary Scan allows pin-level access independent of the device packaging
technology.
IEEE 1149.1 JTAG Boundary Scan is enabled when JTAGSEL is high. The SAMPLE, EXTEST
and BYPASS functions are implemented. In ICE debug mode, the ARM processor responds
with a non-JTAG chip ID that identifies the processor to the ICE system. This is not IEEE 1149.1
JTAG-compliant.
It is not possible to switch directly between JTAG and ICE operations. A chip reset must be per-
formed after JTAGSEL is changed.
A Boundary-scan Descriptor Language (BSDL) file is provided to set up test.
The Boundary-scan Register (BSR) contains 484 bits that correspond to active pins and associ-
ated control signals.
Each AT91SAM9XE input/output pin corresponds to a 3-bit register in the BSR. The OUTPUT
bit contains data that can be forced on the pad. The INPUT bit facilitates the observability of data
applied to the pad. The CONTROL bit selects the direction of the pad.
Table 12-2.AT91SAM9XE JTAG Boundary Scan Register
Bit Number
307
306
305
304
303
302
301
300
299
298
297
296
295
294
293
292
291
290
289
288
287
286
Pin Name
A10
A11
A12
A13
A14
A15
A16
A17
A18
A0
A1
Pin Type
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
Associated BSR Cells
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
6254C–ATARM–22-Jan-10
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL