AD6643 Analog Devices, AD6643 Datasheet - Page 8

• Manufacturer Part Number: AD6643
• Description: Dual IF Receiver
• Manufacturer: Analog Devices

AD6643
SWITCHING SPECIFICATIONS
Table 4.
Parameter
CLOCK INPUT PARAMETERS
DATA OUTPUT PARAMETERS (DATA, OR)
OUT-OF-RANGE RECOVERY TIME
1
2
3
4
TIMING SPECIFICATIONS—AD6643-200/AD6643-250
Table 5.
Parameter
SYNC TIMING REQUIREMENTS
SPI TIMING REQUIREMENTS
Conversion rate is the clock rate after the divider.
See Figure 2 for timing diagram.
Cycles refers to ADC input sample rate cycles.
Not shown in timing diagrams.
Aperture Delay
Aperture Uncertainty (Jitter)
Wake-Up Time (from Standby)
Wake-Up Time (from Power-Down)
Input Clock Rate
Conversion Rate
CLK Period—Divide-by-1 Mode
CLK Pulse Width High
LVDS Mode
Pipeline Delay (Latency)
t
t
t
t
t
t
t
t
t
t
t
SSYNC
HSYNC
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
Divide-by-1 Mode, DCS Enabled
Divide-by-1 Mode, DCS Disabled
Divide-by-2 Through Divide-by-8 Modes, DCS
NSR Enabled
Data Propagation Delay
DCO Propagation Delay
DCO to Data Skew
Enabled
4
1
2
2
2
2
4
2
Conditions
See Figure 3 for timing details
SYNC to the rising edge of CLK setup time
SYNC to the rising edge of CLK hold time
See Figure 45 for SPI timing diagram
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
Time required for the SDIO pin to switch from an input to an output
relative to the SCLK falling edge (not shown in Figure 45)
Time required for the SDIO pin to switch from an output to an input
relative to the SCLK rising edge (not shown in Figure 45)
Symbol
t
t
t
t
t
t
t
CLK
CH
PD
DCO
SKEW
A
J
Rev. A | Page 8 of 36
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
40
4.0
2.25
2.375
0.8
0.3
AD6643-200
Typ
2.5
2.5
4.8
5.5
0.7
10
13
1.0
0.1
10
250
3
Max
625
200
2.75
2.625
1.1
Min
40
4
1.8
1.9
0.8
0.3
Min
2
2
40
2
2
10
10
10
10
AD6643-250
Typ
2.0
2.0
1.0
0.1
4.8
5.5
0.7
10
13
1.0
0.1
10
250
3
Typ
0.3
0.4
Data Sheet
Max
625
250
2.2
2.1
1.1
Max
Unit
MHz
MSPS
ns
ns
ns
ns
ns
ns
ns
Cycles
Cycles
ns
ps rms
μs
μs
Cycles
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3
3