ADP5065 Analog Devices, ADP5065 Datasheet - Page 7

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ADP5065

Manufacturer Part Number
ADP5065
Description
Fast Charge Battery Management with Power Path and USB Compatibility
Manufacturer
Analog Devices
Datasheet

Specifications of ADP5065

Product Description
Fast Charge Battery Management with Power Path and USB Compatibility
Switching/linear
Switching
Cell Type
Li-Ion
Final Voltage Options
4.2
Accuracy Over Temp (%)
0.3%
Temp Range
-40 to +125°C
Package
WLCSP-20
Active For Param Search
Yes
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
VIN1, VIN2 to PGND1, PGND2
All Other Pins to AGND
Continuous Drain Current, Battery Supple-
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
mentary Mode, from ISO_Bx to ISO_Sx
T
T
J
J
≤ 85°C
= 125°C
Rating
−0.5 V to +12 V
−0.3 V to +6 V
2.2 A
1.1 A
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Rev. A | Page 7 of 40
THERMAL RESISTANCE
θ
soldered in a circuit board for surface-mount packages.
Table 5. Thermal Resistance
Package Type
20-Lead WLCSP
1
Maximum Power Dissipation
The maximum safe power dissipation in the
is limited by the associated rise in junction temperature (T
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit may change the stresses that
the package exerts on the die, permanently shifting the para-
metric performance of the ADP5065. Exceeding a junction
temperature of 175°C for an extended period of time can result
in changes in the silicon devices that potentially cause failure.
ESD CAUTION
JA
5 × 4 array, 0.5 mm pitch (2.75 mm × 2.08 mm); based on a JEDEC, 2S2P,
4-layer board with 0 m/sec airflow.
is specified for the worst-case conditions, that is, a device
1
θ
46.8
JA
θ
0.7
JC
ADP5065
θ
9.2
JB
ADP5065
package
Unit
°C/W
J
) on

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