ADP5042

Manufacturer Part NumberADP5042
DescriptionMicro PMU with 0.8 A Buck, Two 300 mA LDOs, Supervisory, Watchdog and Manual Reset
ManufacturerAnalog Devices
ADP5042 datasheet
 


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ADP5042
The peak-to-peak output voltage ripple for the selected output
capacitor and inductor values is calculated using the following
equation:
V
=
IN
V
(
)
RIPPLE
π
×
×
×
×
2
f
2
L
C
SW
OUT
Capacitors with lower equivalent series resistance (ESR) are
preferred to guarantee low output voltage ripple, as shown in
the following equation:
V
RIPPLE
ESR
COUT
I
RIPPLE
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is a minimum of 7 µF and a
maximum of 40 µF.
Table 12. Suggested 10 μF Capacitors
Vendor
Type
Model
Murata
X5R
GRM188R60J106
Taiyo Yuden
X5R
JMK107BJ475
TDK
X5R
C1608JB0J106K
Panasonic
X5R
ECJ1VB0J106M
The buck regulator requires 10 µF output capacitors to guaran-
tee stability and response to rapid load variations and to transition
in and out the PWM/PSM modes. In certain applications, where
the buck regulator powers a processor, the operating state is
known because it is controlled by software. In this condition,
the processor can drive the MODE pin according to the operating
state; consequently, it is possible to reduce the output capacitor
from 10 µF to 4.7 µF because the regulator does not expect a
large load variation when working in PSM mode (see Figure 62).
ADP5042
R
FLT
MICRO PMU
30Ω
AVIN
SW
VOUT1
VIN1
V
PGND
IN
C2
2.3V TO 5.5V
4.7µF
VOUT2
VIN2
C4
1µF
C1
1µF
nRSTO
VIN3
WDI
C3
1µF
MODE
ENx
VOUT3
Figure 62. Processor System Power Management with PSM/PWM Control
Input Capacitor
Higher value input capacitors help to reduce the input voltage
ripple and improve transient response. Maximum input
I
capacitor current is calculated using the following equation:
=
RIPPLE
×
×
8
f
C
SW
OUT
To minimize supply noise, place the input capacitor as close
to the VIN pin of the buck as possible. As with the output
capacitor, a low ESR capacitor is recommended.
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is a minimum of 3 µF and a
maximum of 10 µF. A list of suggested capacitors is shown in
Table 13.
Table 13. Suggested 4.7 μF Capacitors
Case
Voltage
Size
Rating (V)
Vendor
0603
6.3
Murata
0603
6.3
Taiyo Yuden
0603
6.3
Panasonic
0603
6.3
LDO CAPACITOR SELECTION
Output Capacitor
The ADP5042 LDOs are designed for operation with small,
space-saving ceramic capacitors, but they function with most
commonly used capacitors as long as care is taken with the ESR
value. The ESR of the output capacitor affects stability of the
LDO control loop. A minimum of 0.70 µF capacitance with an
ESR of 1 Ω or less is recommended to ensure stability of the
ADP5042. Transient response to changes in load current is also
affected by output capacitance. Using a larger value of output
capacitance improves the transient response of the ADP5042 to
large changes in load current.
L1
PROCESSOR
1µH
Input Bypass Capacitor
VCORE
C6
Connecting a 1 µF capacitor from VIN2 and VIN3 to GND
4.7µF
reduces the circuit sensitivity to printed circuit board (PCB)
layout, especially when long input traces or high source
VDDIO
R1
impedance is encountered. If greater than 1 µF of output
100kΩ
capacitance is required, increase the input capacitor to match it.
RESET
GPIO1
Table 14. Suggested 1.0 μF Capacitors
GPIO2
3
GPIO[x:y]
Vendor
VANA
Murata
C5
1µF
ANALOG
TDK
SUB-SYSTEM
Panasonic
Taiyo Yuden
Rev. A | Page 24 of 32
V
(
V
V
)
IN
I
I
OUT
OUT
CIN
LOAD
(
MAX
)
V
IN
Type
Model
X5R
GRM188R60J475ME19D
X5R
JMK107BJ475
X5R
ECJ-0EB0J475M
Type
Model
X5R
GRM155R61A105ME15
X5R
C1005JB0J105KT
X5R
ECJ0EB0J105K
X5R
LMK105BJ105MV-F
Data Sheet
Voltage
Case
Rating
Size
(V)
0603
6.3
0603
6.3
0402
6.3
Voltage
Case
Rating
Size
(V)
0402
10.0
0402
6.3
0402
6.3
0402
10.0