ADP5042

Manufacturer Part NumberADP5042
DescriptionMicro PMU with 0.8 A Buck, Two 300 mA LDOs, Supervisory, Watchdog and Manual Reset
ManufacturerAnalog Devices
ADP5042 datasheet
 


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Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
AVIN, VINx, VOUTx, ENx, MODE, MR, WDIx,
WMOD, WSTAT, nRSTO to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
ESD Human Body Model
ESD Charged Device Model
ESD Machine Model
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The ADP5042 can be damaged when the junction temperature
limits are exceeded. Monitoring ambient temperature does not
guarantee that the junction temperature is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient
temperature may have to be derated. In applications with
moderate power dissipation and low PCB thermal resistance,
the maximum ambient temperature can exceed the maximum
limit as long as the junction temperature is within specification
limits. The junction temperature of the device is dependent on
the ambient temperature, the power dissipation of the device
(P
), and the junction-to-ambient thermal resistance of the
D
package. Maximum junction temperature is calculated from the
ambient temperature and power dissipation using the formula
T
= T
+ (P
× θ
)
J
A
D
JA
Junction-to-ambient thermal resistance (θ
based on modeling and calculation using a 4-layer board. The
Rating
junction-to-ambient thermal resistance is highly dependent on
−0.3 V to +6 V
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
−65°C to +150°C
board design is required. The value of θ
−40°C to +125°C
PCB material, layout, and environmental conditions. The specified
JEDEC J-STD-020
value of θ
JA
3000 V
as per JEDEC standard. For additional information, see the
1500 V
AN-772
Application Note, A Design and Manufacturing Guide
100 V
for the Lead Frame Chip Scale (LFCSP).
THERMAL RESISTANCE
θ
is specified for the worst-case conditions, that is, a device
JA
soldered in a circuit board for surface-mount packages.
Table 7. Thermal Resistance
Package Type
20-Lead, 0.5 mm pitch LFCSP
ESD CAUTION
Rev. A | Page 7 of 32
ADP5042
) of the package is
JA
may vary, depending on
JA
is based on a four-layer, 4” × 3”, 2.5 oz copper board,
θ
θ
JA
JC
38
4.2
Unit
°C/W