P89LPC933_934_935_936 NXP Semiconductors, P89LPC933_934_935_936 Datasheet - Page 36
P89LPC933_934_935_936
Manufacturer Part Number
P89LPC933_934_935_936
Description
The P89LPC933/934/935/936 is a single-chip microcontroller, available in low costpackages, based on a high performance processor architecture that executes instructionsin two to four clocks, six times the rate of standard 80C51 devices
Manufacturer
NXP Semiconductors
Datasheet
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P89LPC933_934_935_936
Product data sheet
8.19.6 PWM operation
Capture Noise Filter bit. If set, the capture logic needs to see four consecutive samples of
the same value in order to recognize an edge as a capture event. An event counter can be
set to delay a capture by a number of capture events.
PWM operation has two main modes, symmetrical and asymmetrical.
In asymmetrical PWM operation the CCU timer operates in down-counting mode
regardless of the direction control bit.
In symmetrical mode, the timer counts up/down alternately. The main difference from
basic timer operation is the operation of the compare module, which in PWM mode is
used for PWM waveform generation.
As with basic timer operation, when the PWM (compare) pins are connected to the
compare logic, their logic state remains unchanged. However, since bit FCO is used to
hold the halt value, only a compare event can change the state of the pin.
Fig 10. Asymmetrical PWM, down-counting mode
Fig 11. Symmetrical PWM
compare value
compare value
non-inverted
All information provided in this document is subject to legal disclaimers.
non-inverted
timer value
timer value
inverted
0x0000
inverted
TOR2
TOR2
Rev. 8 — 12 January 2011
0
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC933/934/935/936
002aaa894
002aaa893
© NXP B.V. 2011. All rights reserved.
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