P89LPC933_934_935_936 NXP Semiconductors, P89LPC933_934_935_936 Datasheet - Page 46
P89LPC933_934_935_936
Manufacturer Part Number
P89LPC933_934_935_936
Description
The P89LPC933/934/935/936 is a single-chip microcontroller, available in low costpackages, based on a high performance processor architecture that executes instructionsin two to four clocks, six times the rate of standard 80C51 devices
Manufacturer
NXP Semiconductors
Datasheet
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P89LPC933_934_935_936
Product data sheet
Fig 21. Comparator input and output connections
(P0.5) CMPREF
8.23.1 Internal reference voltage
(P0.4) CIN1A
(P0.3) CIN1B
(P0.2) CIN2A
(P0.1) CIN2B
8.23 Analog comparators
V
ref(bg)
Two analog comparators are provided on the P89LPC933/934/935/936. Input and output
options allow use of the comparators in a number of different configurations. Comparator
operation is such that the output is a logic 1 (which may be read in a register and/or routed
to a pin) when the positive input (one of two selectable pins) is greater than the negative
input (selectable from a pin or an internal reference voltage). Otherwise the output is a
zero. Each comparator may be configured to cause an interrupt when the output value
changes.
The overall connections to both comparators are shown in
function to V
When each comparator is first enabled, the comparator output and interrupt flag are not
guaranteed to be stable for 10 microseconds. The corresponding comparator interrupt
should not be enabled during that time, and the comparator interrupt flag must be cleared
before the interrupt is enabled in order to prevent an immediate interrupt service.
When a comparator is disabled the comparator’s output, COn, goes HIGH. If the
comparator output was LOW and then is disabled, the resulting transition of the
comparator output from a LOW to HIGH state will set the comparator flag, CMFn. This will
cause an interrupt if the comparator interrupt is enabled. The user should therefore
disable the comparator interrupt prior to disabling the comparator. Additionally, the user
should clear the comparator flag, CMFn, after disabling the comparator.
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to as
V
ref(bg)
, is 1.23 V ± 10 %.
DD
CP1
CN1
CP2
CN2
All information provided in this document is subject to legal disclaimers.
= 2.4 V.
comparator 1
comparator 2
Rev. 8 — 12 January 2011
8-bit microcontroller with accelerated two-clock 80C51 core
CO1
CO2
change detect
change detect
OE1
OE2
P89LPC933/934/935/936
CMF1
CMF2
CMP1 (P0.6)
CMP2 (P0.0)
Figure
002aaa904
EC
21. The comparators
© NXP B.V. 2011. All rights reserved.
interrupt
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