ST72561AR7 STMicroelectronics, ST72561AR7 Datasheet - Page 176

• Manufacturer Part Number: ST72561AR7
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72561AR7

• Hdflash Endurance: 100 cycles, data retention 40 years at 85°C
• 5 Power Saving Modes: Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow

ST72561
beCAN CONTROLLER (Cont’d)
10.9.4.2 Reception Handling
For the reception of CAN messages, three
mailboxes organized as a FIFO are provided. In
order to save CPU load, simplify the software and
guarantee data consistency, the FIFO is managed
completely by hardware. The application accesses
the messages stored in the FIFO through the FIFO
output mailbox.
Valid Message
Figure 101. Receive FIFO states
176/265
EMPTY
FMP=0x00
FOVR=0
Release
Mailbox
Valid Message
Received
Release
Mailbox
RFOM=1
Release
Mailbox
RFOM=1
PENDING_1
FMP=0x01
FOVR=0
PENDING_3
FMP=0x11
FOVR=0
PENDING_2
FMP=0x10
FOVR=0
A received message is considered as valid when it
has been received correctly according to the CAN
protocol (no error until the last but one bit of the
EOF field) and It passed through the identifier fil-
tering successfully, see
Filtering.
Valid Message
Received
Valid Message
Received
Release
Mailbox
RFOM=1
Valid Message
Received
Section 0.1.4.3 Identifier
Valid Message
Received
OVERRUN
FMP=0x11
FOVR=1