ST72561AR7 STMicroelectronics, ST72561AR7 Datasheet - Page 25

• Manufacturer Part Number: ST72561AR7
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72561AR7

• Hdflash Endurance: 100 cycles, data retention 40 years at 85°C
• 5 Power Saving Modes: Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow

6.4 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
the Low Voltage Detector (LVD) and Auxiliary Volt-
age Detector (AVD) functions. It is managed by
the SICSR register.
6.4.1 Low Voltage Detector (LVD)
The Low Voltage Detector function (LVD) gener-
ates a static reset when the V
below a V
it secures the power-up as well as the power-down
keeping the ST7 in reset.
The V
lower than the V
on in order to avoid a parasitic reset when the
MCU starts running and sinks current on the sup-
ply (hysteresis).
The LVD Reset circuitry generates a reset when
V
The LVD function is illustrated in
Figure 15. Low Voltage Detector vs Reset
DD
– V
– V
V
V
RESET
IT+
IT-
is below:
IT+(LVD)
IT-(LVD)
IT-(LVD)
(LVD)
(LVD)
IT-(LVD)
when V
reference value for a voltage drop is
when V
V
DD
IT+(LVD)
reference value. This means that
DD
DD
reference value for power-
is falling
is rising
DD
Figure
supply voltage is
15.
Provided the minimum V
the oscillator frequency) is above V
MCU can only be in two modes:
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes:
The LVD allows the device to be used without any
external RESET circuitry.
The LVD is an optional function which can be se-
lected by option byte.
It is recommended to make sure that the V
ply voltage rises monotonously when the device is
exiting from Reset, to ensure the application func-
tions properly.
V
– under full software control
– in static safe reset
hys
DD
value (guaranteed for
IT-(LVD)
ST72561
DD
25/265
, the
sup-