ST72561J6-Auto STMicroelectronics, ST72561J6-Auto Datasheet - Page 136

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ST72561J6-Auto

Manufacturer Part Number
ST72561J6-Auto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72561J6-Auto

Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
8-bit timer (TIM8)
13.3.6
136/324
Figure 68. One pulse mode timing example
Figure 69. Pulse width modulation mode timing example
Pulse width modulation mode
Pulse Width Modulation (PWM) mode enables the generation of a signal with a frequency
and pulse length determined by the value of the OC1R and OC2R registers.
Pulse Width Modulation mode uses the complete Output Compare 1 function plus the
OC2R register, and so this functionality can not be used when PWM mode is activated.
In PWM mode, double buffering is implemented on the output compare registers. Any new
values written in the OC1R and OC2R registers are taken into account only at the end of the
PWM period (OC2) to avoid spikes on the PWM output pin (OCMP1).
Procedure
To use pulse width modulation mode:
Note: IEDG1 = 1, OC1R = D0h, OLVL1 = 0, OLVL2 = 1
Note: OC1R = D0h, OC2R = E2, OLVL1 = 0, OLVL2 = 1
COUNTER
COUNTER E2
OCMP1
ICAP1
OCMP1
IC1R
compare2
F8
Doc ID 12370 Rev 8
FC
FC
FD
FD
OLVL2
FE
OLVL2
FE
F8
compare1
compare1
D0
D0
D1
D1
OLVL1
OLVL1
D3
D2
D2
compare2
D3
FC
E2
OLVL2
ST72561-Auto
OLVL2
FD
FC

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