ST72561J6-Auto STMicroelectronics, ST72561J6-Auto Datasheet - Page 54

• Manufacturer Part Number: ST72561J6-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J6-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

Interrupts
6.5
6.5.1
54/324
Figure 20. Nested interrupt management
Interrupt register description
CPU CC register interrupt bits
Read/Write
Reset value: 111x 1010 (xAh)
Bit 5, 3 = I1, I0 Software Interrupt Priority
These two bits indicate the current interrupt software priority.
Table 13.
1. TLI, TRAP and RESET events can interrupt a level 3 program.
These two bits are set/cleared by hardware when entering in interrupt. The loaded value is
given by the corresponding bits in the interrupt software priority registers (ISPRx).
They can be also set/cleared by software with the RIM, SIM, HALT, WFI, IRET and
PUSH/POP instructions (see
Level 0 (main)
Level 1
Level 2
Level 3 (= interrupt disable
7
1
Interrupt software priority
Interrupt software priority levels
11 / 10
MAIN
RIM
1
IT2
IT1
(1)
)
I1
Table 15: Dedicated interrupt instruction set on page
IT4
Doc ID 12370 Rev 8
TLI
IT4
H
IT0
IT3
I0
IT1
Level
High
Low
IT2
10
SOFTWARE
PRIORITY
LEVEL
MAIN
N
I1
1
0
1
3
3
2
1
3
3
3/0
I1
Z
ST72561-Auto
1 1
1 1
0 0
0 1
1 1
1 1
I0
55).
I0
0
1
0
1
C
0