STE400P STMicroelectronics, STE400P Datasheet - Page 22

• Manufacturer Part Number: STE400P
• Description: STE400P - 4 PORT 10-100 FAST ETHERNET TRANSCEIVER - PHY DATASHEET
• Manufacturer: STMicroelectronics

STE400P
8.6 Full Duplex and Half Duplex Operation
The STE400P can operate for either full duplex or half duplex network application. In full duplex, both transmit
and receive can be operated simultaneously. Under full duplex mode, collision(COL) signal is ignored and car-
rier sense(CRS) signal is asserted only when the STE400P is receiving.
In half duplex mode, either transmit or receive can be operated at one time. Under half duplex mode, collision
signal is asserted when transmit and receive signals collided and carrier sense asserted during transmission
and reception.
8.7 Auto-Negotiation Operation
The Auto-Negotiation function is designed to provide the means to exchange information between the STE400P
and the network partner to automatically configure both to take maximum advantage of their abilities, and both
are setup accordingly. The Auto-Negotiation function can be controlled through ANE, bit 12 of the PR0 register.
Auto-Negotiation exchanges information with the network partner using the Fast Link Pulses(FLPs) - a burst of
link pulses. There are 16 bits of signaling information contained in the burst pulses to advertise all remote part-
ner’s capabilities which are determined by the register of PR4. According to this information they find out their
highest common capability by following the priority sequence as below:
During power-up or reset, if Auto-Negotiation is found enabled then FLPs will be transmitted and the Auto-Ne-
gotiation function will proceed. Otherwise, the Auto-Negotiation will not occur until the bit 12 of PR0 register is
set to 1. When Auto-Negotiation is disabled, then the Network Speed and Duplex Mode are selected by pro-
gramming PR0 register.
8.8 Power Down Operation
To reduce the power consumption, the STE400P is designed with a power down feature, which can save the power
consumption significantly. Since the power supply of the 100BASE-TX and 10BASE-T circuits are separated, the
STE400P can turn off the circuit of either the 100BASE-TX or 10BASE-T when the other one of them is operating.
There is also a Power Down mode which can be selected by PDEN in register PR0 bit 11. During the Power Down
mode, TXP/TXN outputs and all LED outputs are 3-stated, and the MII interface is isolated. During Power Down mode
the MII management interface is still available for reading and writing device registers. Power Down mode can be ex-
ited by clearing bit 11 of register PR0 or by a hardware or software reset (setting PR0:15=1).
8.9 LED Display Operation
The STE400P provides 2 functions for the LED pins, the detail descriptions about the operation are described
in the PIN Description section, and as follows.
8.10 Reset Operation
There are two ways to reset the STE400P. First, for hardware reset, the STE400P can be reset via RESET pin
(pin 119). The active low Reset input signal is required at least 1 ms to ensure proper reset operation. Second,
for software reset, when bit 15 of register PR0 is set to 1, the STE400P will reset entire circuits and registers to
their default values, and clear the bit 15 of PR0 to 0. Both hardware and software reset operations initialize all
registers to their default values. This process includes re-evaluation of all hardware-configurable registers. Log-
ic levels on several I/O pins are detected during hardware reset period to determine the initial functionality of
STE400P. Some of these pins are used as outputs after the reset operation. Care must be taken to ensure that
the configuration setup will not interfere with normal operation. Dedicated configuration pins can be tied to the
Vcc or ground directly. Configuration pins multiplexed with LED outputs should be weakly pulled up or weakly
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1. 100BASE-TX full duplex
2. 100BASE-TX half duplex
3. 10BASE-T full duplex
4. 10BASE-T half duplex