STE400P STMicroelectronics, STE400P Datasheet - Page 4

• Manufacturer Part Number: STE400P
• Description: STE400P - 4 PORT 10-100 FAST ETHERNET TRANSCEIVER - PHY DATASHEET
• Manufacturer: STMicroelectronics

STE400P
5.0 PIN DESCRIPTION
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Table 1. Pin Description
MII Interface
Pin.
208
150
149
148
147
124
123
122
121
146
120
145
130
192
193
194
195
170
169
168
167
138
137
136
134
196
166
133
191
171
139
33
34
35
36
10
37
11
27
12
19
20
21
23
24
18
1
9
RXD3 {1}
RXD2 {1}
RXD1 {1}
RXD0 {1}
RXD3 {2}
RXD2 {2}
RXD1 {2}
RXD0 {2}
RXD3 {3}
RXD2 {3}
RXD1 {3}
RXD0 {3}
RXD3 {4}
RXD2 {4}
RXD1 {4}
RXD0 {4}
TXD3 {1}
TXD2 {1}
TXD1 {1}
TXD0 {1}
TXD3 {2}
TXD2 {2}
TXD1 {2}
TXD0 {2}
TXD3 {3}
TXD2 {3}
TXD1 {3}
TXD0 {3}
TXD3 {4}
TXD2 {4}
TXD1 {4}
TXD0 {4}
RXDV1
RXDV2
RXDV3
RXDV4
RXER1
RXER2
RXER3
RXER4
TXEN1
TXEN2
TXEN3
TXEN4
Name
TXC1
TXC2
TXC3
TXC4
Type
O3s
O3s
O3s
O3s
Ipd
Ipd
Transmit Data. The Media Access Controller (MAC) drives data to the
STE400P using these inputs.
These signals must be synchronized to the TX-CLK.
Transmit Enable. The MAC asserts this signal when it drives valid data on
the TXD inputs. This signal must be synchronized to the TX-CLK.
Transmit Clock. Normally the STE400P drives TX-CLK. Refer to the Clock
Requirements discussion in the Functional Description section.
25 MHz for 100 Mbps operation.
2.5 MHz for 10 Mbps operation.
Receive Data. The STE400P drives received data on these outputs,
synchronous to RX-CLK.
RXD4 is driven only in Symbol (5B) Mode.
Receive Data Valid. The STE400P asserts This signal when it drives valid
data on RXD. This output is synchronous to RX-CLK.
Receive Error. The STE400P asserts this output when it receives invalid
symbols from the network. This signal is synchronous to RX-CLK. In Symbol
(5B) Mode this pin is also equivalent to RXD4.
Description