XC3S50A Xilinx Corp., XC3S50A Datasheet - Page 68

• Manufacturer Part Number: XC3S50A
• Description: Spartan-3a Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

Pinout Descriptions
User I/Os by Bank
Table 61
distributed between the four I/O banks on the TQ144
package. The AWAKE pin is counted as a Dual-Purpose
I/O.
Table 61: User I/Os Per Bank for the XC3S50A in the TQ144 Package
Footprint Migration Differences
The XC3S50A FPGA is the only Spartan-3A device offered
in the TQ144 package.
68
Top
Right
Bottom
Left
TOTAL
Package
Edge
indicates how the 108 available user-I/O pins are
I/O Bank
0
1
2
3
Maximum I/O
108
27
25
30
26
I/O
14
11
15
42
2
www.xilinx.com
INPUT
1
0
0
1
2
All Possible I/O Pins by Type
DUAL
21
26
1
4
0
DS529-4 (v1.5) July 10, 2007
VREF
3
2
1
2
8
Product Specification
CLK
30
8
8
6
8
R