IS61C5128AL Integrated Silicon Solution, Inc., IS61C5128AL Datasheet - Page 9

• Manufacturer Part Number: IS61C5128AL
• Description: 512k X 8 High-speed Cmos Static Ram
• Manufacturer: Integrated Silicon Solution, Inc.

IS61C5128AL/AS
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW, and WE LOW. All signals must be in valid states to initiate a
Integrated Silicon Solution, Inc. — www.issi.com
Rev. B
03/04/2008
Symbol Parameter
t
t
t
t
t
t
t
t
t
t
t
and output loading specified in Figure 1.
Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or
falling edge of the signal that terminates the write.
WC
SCE
HA
SD
HD
HZWE
LZWE
AW
SA
PWE
PWE
1
2
(2)
(2)
Write Cycle Time
CE to Write End
Address Setup Time
to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width (OE =High)
WE Pulse Width (OE=Low)
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
IS64C5128AL/AS
Min.
10
—
7
7
0
0
7
7
6
0
3
-10
Max.
—
—
—
—
—
—
—
—
—
—
6
Min.
12
—
9
9
0
0
9
9
6
0
3
-12
(1,3)
Max.
—
—
—
—
—
—
—
—
—
—
6
(Over Operating Range)
Min. Max.
25
18
18
15
15
15
—
0
0
0
5
-25
15
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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