ACS8514 Semtech Corporation, ACS8514 Datasheet - Page 10

• Manufacturer Part Number: ACS8514
• Description: Synchronous Equipment Timing Source Partner IC for 2nd T4 Dpll, Accurate Monitoring & Input Extender
• Manufacturer: Semtech Corporation

Notes:
Clock Quality Monitoring
Clock quality is monitored and used to modify the priority
tables of the local and remote ACS8520/30 devices. The
following parameters are monitored continuously for all 14
inputs in parallel :
1. Activity (toggling).
2. Frequency to +/- 3.8 ppm accuracy (this monitoring is
A fine level of frequency monitoring and phase monitoring
is also performed in the two DPLLs. Phase is measured
down to 0.7 degrees with a maximum range of +/- 8191
cycles or +/- 2.9 x 10
a 0.0003 ppm resolution and +/- 80 ppm range (could be
up to +/- 500 ppm with software enhanced use of the
calibration register (3Ch, 3Dh).
Revision 3.00 April 2007 © Semtech Corp.
I6
I7
I8
I9
I10
I11
I12
I13
I14
ADVANCED COMMS & SENSING
Number
(i) TTL ports (compatible also with CMOS signals) support clock speeds up to 100 MHz, with the highest spot frequency being 77.76 MHz.
(ii) PECL and LVDS ports support the spot clock frequencies listed above plus 155.52 MHz.
only performed when there is no irregular operation of
the clock or loss of clock condition).
Port
The actual spot frequencies are: 2 kHz, 4 kHz, 8 kHz (and N x 8 kHz), 1.544 MHz (SONET)/2.048 MHz (SDH), 6.48 MHz, 19.44 MHz,
25.92 MHz, 38.88 MHz, 51.84 MHz, 77.76 MHz. SONET or SDH input rate is selected via register 34 bit 2, ip_sonsdhb ).
0110
0111
1000
1001
1010
1011
1100
1101
1110
Number (Bin)
Channel
6
degrees. Frequency is measured to
PECL/LVDS
PECL default
TTL/CMOS
TTL/CMOS
TTL/CMOS
TTL/CMOS
TTL/CMOS
TTL/CMOS
TTL/CMOS
TTL/CMOS
Technology
Input Port
Up to 155.52 MHz (see Note (ii))
Default (SONET): 19.44 MHz Default (SDH): 19.44 MHz
Up to 100 MHz (see Note 0)
Default (SONET): 19.44 MHz Default (SDH): 19.44 MHz
Up to 100 MHz (see Note 0)
Default (SONET): 19.44 MHz Default (SDH): 19.44 MHz
Up to 100 MHz (see Note 0)
Default (SONET): 19.44 MHz Default (SDH): 19.44 MHz
Up to 100 MHz (see Note 0)
Default (SONET): 19.44 MHz Default (SDH): 19.44 MHz
Up to 100 MHz (see Note 0) Default (Master) (SONET): 1.544 MHz
Default (Master) (SDH): 2.048 MHz Default (Slave) 6.48 MHz
Up to 100 MHz (see Note 0)
Default (SONET): 1.544 MHz Default (SDH): 2.048 MHz
Up to 100 MHz (see Note 0)
Default (SONET): 1.544 MHz Default (SDH): 2.048 MHz
Up to 100 MHz (see Note 0)
Default (SONET): 1.544 MHz Default (SDH): 2.048 MHz
Page 10
FINAL
Input ports I1 and I2 carry AMI-encoded composite clocks
which are also additionally monitored by the AMI-decoder
blocks. Loss of signal is declared by the decoders when
either the signal amplitude falls below +0.3 V or there is
no activity for 1 ms.
Any reference source that suffers a loss-of-activity or
clock-out-of-band
unavailable.
Activity Monitoring
The ACS8514 tests for too much or too little activity via
the activity monitors. The ACS8514 uses a Leaky Bucket
Accumulator, which is a digital circuit which mimics the
operation of an analog integrator, in which input pulses
increase the output amplitude but die away over time.
Such integrators are used when alarms have to be
triggered either by fairly regular defect events, which
Frequencies Supported
ACS8514 SETS Buddy
condition
will
be
DATASHEET
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declared
7
8
9
10
11
12
0
0
0
Default
Priority
as