ACS8514 Semtech Corporation, ACS8514 Datasheet - Page 34

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ACS8514

Manufacturer Part Number
ACS8514
Description
Synchronous Equipment Timing Source Partner IC for 2nd T4 Dpll, Accurate Monitoring & Input Extender
Manufacturer
Semtech Corporation
Datasheet
Revision 3.00 April 2007 © Semtech Corp.
Address(hex):
Address(hex): 06
Register Name
MonDPLL_state Mon_ref_failed
ADVANCED COMMS & SENSING
Bit No.
Bit No.
Bit 7
2
1
0
7
6
5
4
3
2
Description
I3
Interrupt indicating that input I3 has become valid (if
it was invalid), or invalid (if it was valid). Latched
until reset by software writing a 1 to this bit.
I2
Interrupt indicating that input I2 has become valid (if
it was invalid), or invalid (if it was valid). Latched
until reset by software writing a 1 to this bit.
I1
Interrupt indicating that input I1 has become valid (if
it was invalid), or invalid (if it was valid). Latched
until reset by software writing a 1 to this bit.
sts_interrupts
Description
MonDPLL_state
Interrupt indicating that the lock state of the Monitor
DPLL has changed. Latched until reset by software
writing a 1 to this bit.
Mon_ref_failed
Interrupt indicating that input to the Monitor DPLL
has failed. This interrupt will be raised after 2
missing input cycles. This is much quicker than
waiting for the input to become invalid. This input is
not generated in Free-run or Holdover modes.
Latched until reset by software writing a 1 to this bit.
I14
Interrupt indicating that input I14 has become valid
(if it was invalid), or invalid (if it was valid). Latched
until reset by software writing a 1 to this bit.
I13
Interrupt indicating that input I13 has become valid
(if it was invalid), or invalid (if it was valid). Latched
until reset by software writing a 1 to this bit.
I12
Interrupt indicating that input I12 has become valid
(if it was invalid), or invalid (if it was valid). Latched
until reset by software writing a 1 to this bit.
I11
Interrupt indicating that input I11 has become valid
(if it was invalid), or invalid (if it was valid). Latched
until reset by software writing a 1 to this bit.
05
Bit 6
(continued)
I14
Bit 5
Description
I13
Bit 4
Page 34
FINAL
(R/W) bits [15:8] of the interrupt
status register.
I12
Bit Value
Bit Value
Bit 3
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Value Description
Input I3 has not changed status (valid/invalid).
Input I3 has changed status (valid/invalid).
Writing 1 resets the input to 0.
Input I2 has not changed status (valid/invalid).
Input I2 has changed status (valid/invalid).
Writing 1 resets the input to 0.
Input I1 has not changed status (valid/invalid).
Input I1 has changed status (valid/invalid).
Writing 1 resets the input to 0.
I11
Value Description
Operating mode has not changed.
Operating mode has changed.
Writing 1 resets the input to 0.
Input to the Monitor DPLL is valid.
Input to the Monitor DPLL has failed.
Writing 1 resets the input to 0.
Input I14 has not changed status (valid/invalid).
Input I14 has changed status (valid/invalid).
Writing 1 resets the input to 0.
Input I13 has not changed status (valid/invalid).
Input I13 has changed status (valid/invalid).
Writing 1 resets the input to 0.
Input I12 has not changed status (valid/invalid).
Input I12 has changed status (valid/invalid).
Writing 1 resets the input to 0.
Input I11 has not changed status (valid/invalid).
Input I11 has changed status (valid/invalid).
Writing 1 resets the input to 0.
ACS8514 SETS Buddy
Bit 2
Default Value
I10
Bit 1
DATASHEET
www.semtech.com
0011 1111
I9
Bit 0

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