AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 129

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

Timer/Counter Timing
Diagrams
4250C–CAN–03/04
In phase and frequency correct PWM mode, the compare units allow generation of
PWM waveforms on the OCnx pins. Setting the COMnx1:0 bits to two will produce a
non-inverted PWM and an inverted PWM output can be generated by setting the
COMnx1:0 to three (See Table on page 133). The actual OCnx value will only be visible
on the port pin if the data direction for the port pin is set as output (DDR_OCnx). The
PWM waveform is generated by setting (or clearing) the OCnx Register at the compare
match between OCRnx and TCNTn when the counter increments, and clearing (or set-
ting) the OCnx Register at compare match between OCRnx and TCNTn when the
counter decrements. The PWM frequency for the output when using phase and fre-
quency correct PWM can be calculated by the following equation:
The N variable represents the prescaler divider (1, 8, 64, 256, or 1024).
The extreme values for the OCRnx Register represents special cases when generating
a PWM waveform output in the phase correct PWM mode. If the OCRnx is set equal to
BOTTOM the output will be continuously low and if set equal to TOP the output will be
set to high for non-inverted PWM mode. For inverted PWM the output will have the
opposite logic values.
The Timer/Counter is a synchronous design and the timer clock (clk
shown as a clock enable signal in the following figures. The figures include information
on when interrupt flags are set, and when the OCRnx Register is updated with the
OCRnx buffer value (only for modes utilizing double buffering). Figure 56 shows a timing
diagram for the setting of OCFnx.
Figure 56. Timer/Counter Timing Diagram, Setting of OCFnx, no Prescaling
Figure 57 shows the same timing data, but with the prescaler enabled.
TCNTn
OCRnx
OCFnx
(clk
clk
clk
I/O
I/O
Tn
/1)
OCRnx - 1
f
O C n x P F C P W M
OCRnx
OCRnx Value
=
- - - - - - - - - - - - - - - - - - - - - - - - - - - -
2
f
clk_I/O
N T O P
OCRnx + 1
AT90CAN128
OCRnx + 2
Tn
) is therefore
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