AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 296

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AT90CAN128-16AE

Manufacturer Part Number
AT90CAN128-16AE
Description
8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
Manufacturer
ATMEL Corporation
Datasheet
Scanning the Analog
Comparator
296
AT90CAN128
Figure 146. Boundary-scan Cells for Oscillators and Clock Options
Table 108 summaries the scan registers for the external clock pin XTAL1, oscillators
with XTAL1/XTAL2 connections as well as external Timer2 clock pin TOSC1 and 32kHz
Timer2 Oscillator.
Table 108. Scan Signals for the Oscillators
Notes:
The relevant Comparator signals regarding Boundary-scan are shown in Figure 147.
The Boundary-scan cell from Figure 148 is attached to each of these signals. The sig-
nals are described in Table 109.
The Comparator need not be used for pure connectivity testing, since all analog inputs
are shared with a digital port pin as well.
Enable Signal
EXTCLKEN
OSCON
OSC32EN
TOSKON
From Digital Logic
1. Do not enable more than one clock source as clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift
3. The main clock configuration is programmed by fuses. As a fuse is not changed run-
between the internal Oscillator and the JTAG TCK clock. If possible, scanning an
external clock is preferred.
time, the main clock configuration is considered fixed for a given application. The
user is advised to scan the same clock option as to be used in the final system. The
enable signals are supported in the scan chain because the system logic can disable
clock options in sleep modes, thereby disconnecting the Oscillator pins from the scan
path if not provided.
Previous
From
Cell
ShiftDR
0
1
EXTCLK (XTAL1)
OSCCK
OSC32CK
TOSCK
ClockDR
Scanned Clock
D
Line
UpdateDR
Q
Next
Cell
To
D
G
Q
EXTEST
0
1
Clock Option
External Crystal
External Ceramic Resonator
Low Freq. External Crystal
External Main Clock
32 kHz Timer2 Oscillator
XTAL1 / TOSC1
ENABLE
(1)(2)(3)
Oscillator
XTAL2 / TOSC2
OUTPUT
Previous
From
Cell
ShiftDR
0
1
ClockDR
Scanned Clock Line
when not Used
D
FF1
Q
Next
Cell
To
4250C–CAN–03/04
0
1
1
1
To System Logic

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