AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 152

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AT90CAN128-16AE

Manufacturer Part Number
AT90CAN128-16AE
Description
8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
Manufacturer
ATMEL Corporation
Datasheet
8-bit Timer/Counter
Register Description
Timer/Counter2 Control
Register A– TCCR2A
152
AT90CAN128
Figure 71 shows the setting of OCF2A and the clearing of TCNT2 in CTC mode.
Figure 71. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with
Prescaler (f
• Bit 7 – FOC2A: Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode. However,
for ensuring compatibility with future devices, this bit must be set to zero when TCCR2A
is written when operating in PWM mode. When writing a logical one to the FOC2A bit,
an immediate compare match is forced on the Waveform Generation unit. The OC2A
output is changed according to its COM2A1:0 bits setting. Note that the FOC2A bit is
implemented as a strobe. Therefore it is the value present in the COM2A1:0 bits that
determines the effect of the forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR2A as TOP.
The FOC2A bit is always read as zero.
Bit
Read/Write
Initial Value
TCNTn
(clk
(CTC)
OCRnx
OCFnx
clk
clk
I/O
I/O
Tn
/8)
clk_I/O
FOC2A
W
7
0
/8)
TOP - 1
WGM20
R/W
6
0
COM2A1
R/W
5
0
COM2A0
R/W
TOP
4
0
WGM21
TOP
R/W
3
0
CS22
R/W
BOTTOM
2
0
CS21
R/W
1
0
CS20
R/W
4250C–CAN–03/04
0
0
BOTTOM + 1
TCCR2A

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