AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 209

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

TWI Data Register – TWDR
TWI (Slave) Address Register
– TWAR
4250C–CAN–03/04
• Bits 1..0 – TWPS: TWI Prescaler Bits
These bits can be read and written, and control the bit rate prescaler.
Table 89. TWI Bit Rate Prescaler
To calculate bit rates, see “Bit Rate Generator Unit” on page 205. The value of
TWPS1..0 is used in the equation.
In Transmit mode, TWDR contains the next byte to be transmitted. In receive mode, the
TWDR contains the last byte received. It is writable while the TWI is not in the process of
shifting a byte. This occurs when the TWI interrupt flag (TWINT) is set by hardware.
Note that the Data Register cannot be initialized by the user before the first interrupt
occurs. The data in TWDR remains stable as long as TWINT is set. While data is shifted
out, data on the bus is simultaneously shifted in. TWDR always contains the last byte
present on the bus, except after a wake up from a sleep mode by the TWI interrupt. In
this case, the contents of TWDR is undefined. In the case of a lost bus arbitration, no
data is lost in the transition from Master to Slave. Handling of the ACK bit is controlled
automatically by the TWI logic, the CPU cannot access the ACK bit directly.
• Bits 7..0 – TWD: TWI Data Register
These eight bits constitute the next data byte to be transmitted, or the latest data byte
received on the TWI Serial Bus.
• Bits 7..1 – TWA: TWI (Slave) Address Register
These seven bits constitute the slave address of the TWI unit. The TWAR should be
loaded with the 7-bit slave address to which the TWI will respond when programmed as
a slave transmitter or receiver, and not needed in the master modes. In multimaster sys-
tems, TWAR must be set in masters which can be addressed as slaves by other
masters.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
TWPS1
0
0
1
1
TWD7
TWA6
R/W
R/W
7
1
7
1
TWD6
TWA5
R/W
R/W
6
1
6
1
TWD5
TWA4
TWPS0
R/W
R/W
5
1
5
1
0
1
0
1
TWD4
TWA3
R/W
R/W
4
1
4
1
Prescaler Value
1
4
16
64
TWD3
TWA2
R/W
R/W
3
1
3
1
TWD2
TWA1
R/W
R/W
2
1
2
1
AT90CAN128
TWD1
TWA0
R/W
R/W
1
1
1
1
TWGCE
TWD0
R/W
R/W
0
1
0
0
TWDR
TWAR
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