AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 251

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

CAN Bit Timing Register 1 -
CANBT1
CAN Bit Timing Register 2 -
CANBT2
4250C–CAN–03/04
• Bits 14:0 - SIT14:0: Status of Interrupt by MOb
Note:
• Bit 15 – Reserved Bit
This bit is reserved for future use.
• Bit 7– Reserved Bit
This bit is reserved for future use. For compatibility with future devices, this must be writ-
ten to zero when CANBT1 is written.
• Bit 6:1 – BRP5:0: Baud Rate Prescaler
The period of the CAN controller system clock Tscl is programmable and determines the
individual bit timing.
• Bit 0 – Reserved Bit
This bit is reserved for future use. For compatibility with future devices, this must be writ-
ten to zero when CANBT1 is written.
• Bit 7– Reserved Bit
This bit is reserved for future use. For compatibility with future devices, this must be writ-
ten to zero when CANBT2 is written.
• Bit 6:5 – SJW1:0: Re-Synchronization Jump Width
To compensate for phase shifts between clock oscillators of different bus controllers, the
controller must re-synchronize on any relevant signal edge of the current transmission.
The synchronization jump width defines the maximum number of clock cycles. A bit
period may be shortened or lengthened by a re-synchronization.
• Bit 4 – Reserved Bit
This bit is reserved for future use. For compatibility with future devices, this must be writ-
ten to zero when CANBT2 is written.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
–
–
0 - no interrupt.
1- MOb interrupt.
Example: CANSIT2 = 0010 0001
7
7
-
-
-
-
-
-
BRP5
SJW1
R/W
R/W
6
0
6
0
SJW0
BRP4
R/W
R/W
5
0
5
0
Tsjw = Tscl x (SJW [1:0] +1)
Tscl =
b
BRP3
: MOb 0 & 5 interrupts.
R/W
4
0
4
-
-
-
clk
BRP[5:0] + 1
IO
frequency
BRP2
PRS2
R/W
R/W
3
0
3
0
BRP1
PRS1
R/W
R/W
2
0
2
0
AT90CAN128
BRP0
PRS0
R/W
R/W
1
0
1
0
0
0
-
-
-
-
-
-
CANBT1
CANBT2
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