AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 28

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

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AT90CAN128
timing requirements to the same XMEM interface. For XMEM interface timing details,
please refer to Tables 140 through Tables 147 and Figure 170 to Figure 173 in the
“External Data Memory Characteristics” on page 362.
Note that the XMEM interface is asynchronous and that the waveforms in the following
figures are related to the internal system clock. The skew between the internal and
external clock (XTAL1) is not guarantied (varies between devices temperature, and sup-
ply voltage). Consequently, the XMEM interface is not suited for synchronous operation.
Figure 14. External Data Memory Cycles no Wait-state (SRWn1=0 and SRWn0=0)
Note:
Figure 15. External Data Memory Cycles with SRWn1 = 0 and SRWn0 = 1
Note:
System Clock (CLK
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 1)
System Clock (CLK
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 1)
sector) or SRW00 (lower sector). The ALE pulse in period T4 is only present if the
next instruction accesses the RAM (internal or external).
sector) or SRW00 (lower sector).
The ALE pulse in period T5 is only present if the next instruction accesses the RAM
(internal or external).
DA7:0
A15:8
CPU
ALE
WR
RD
)
Prev. addr.
Prev. data
Prev. data
Prev. data
DA7:0
A15:8
CPU
ALE
WR
RD
)
Prev. addr.
Prev. data
Prev. data
Prev. data
T1
T1
Address
Address
Address
T2
Address
Address
XX
Address
T2
XX
Address
T3
Data
Data
Data
Address
T3
Data
Data
Data
T4
T4
T5
4250C–CAN–03/04
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