SPC7281 Epson Electronics America, Inc., SPC7281 Datasheet - Page 77

• Manufacturer Part Number: SPC7281
• Description: IEEE1394 Controller
• Manufacturer: Epson Electronics America, Inc.

Async TxDMA Control Register
Bit7 Async Transmit Packet Header Channel Select
Bit6 Reserved
Bit5 Reserved
Bit4 Block Write Request Packet Data Area Select
Bit3 Async FIFO Empty
Bit2 Async FIFO Clear
Bit1 Async Transmit Monitor
Bit0 Async Transmit Start
Address Register Name
0x52
Selects the header area of an Async Transmit packet from DMA. You transmit send a transmit packet from the
selected area. This bit selects “0”: AsyncTxPktHdr0 or “1”: AsyncTxPktHdr1. Since the AsyncTxPktHdr1 area
overlaps the ISOTxPktHdr area, however, the firmware must decide how to use this area.
Can divide the store area of the Block Write Request packet data between the RxORBArea and RxStreamArea.
o:RxORBArea
1:RxStreamArea
When the DMA-FIFO for Async is empty, this bit becomes “0”. When it is not empty, it is “1”. This bit is read-
only and writing to this bit is ignored.
Clears the DMA-FIFO for Async. Writing “1” to this bit clears the FIFO. After clearing it, this bit is
automatically restored to “0”.
Indicates the transmit status of Async. “1” indicates that an Async packet is in transmission and “0” indicates
that no Async packet is in transmission. This bit is read-only and writing to this bit is ignored.
Transmits an Async packet. Writing “1” to this bit starts to transmit an Async packet. On completion of the
transmission, it is automatically restored to “0”. If you read this bit, it always indicates “0” regardless of
presence/absence of transmit.
AsyDmaCtl
7: AsyChnlSel
6:
5:
4: BlkWrAreaSel R/W 0: Rx ORB Area
3: AsyFIFOEpty R
2: AsyFIFOClr
1: AsyTxMon
0: AsyStart
Bit Symbol
R/W
R/W 0: AsyTxPktHdr0
W
W
R
0:
0:
0: AsyFIFO Empty
0: Normal
0: Async Tx Stop
0: normal
EPSON
Description
1: AsyTxPktHdr1
1:
1:
1: Rx Stream Area
1: Non Empty
1: AsyFIFO Clear
1: Async Tx Run
1: Async Start
H.Rst S.Rst B.Rst
S1R72801F00A
0x00 0x00
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