IDT70V07 Integrated Device Technology, IDT70V07 Datasheet - Page 4

• Manufacturer Part Number: IDT70V07
• Description: 32k X 8 3.3v Dual-port
• Manufacturer: Integrated Device Technology

Pin Configurations
NOTES:
1. All V
2. All GND pins must be connected to ground.
3. Package body is approximately 1.18 in x 1.18 in x .16 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
IDT70V07S/L
High-Speed 32K x 8 Dual-Port Static RAM
CC
pins must be connected to power supply.
INDEX
10/25/01
11
10
09
08
07
06
05
04
03
02
01
53
55
57
59
61
63
65
67
68
SEM
A
I/O
I/O
A
V
OE
A
A
14L
11L
CC
A
7L
9L
0L
1L
L
L
51
52
54
56
58
60
62
64
66
1
2
R/W
(1,2,3)
I/O
I/O
A
A
A
CE
A
A
A
N/C
10L
12L
13L
B
5L
6L
8L
2L
3L
L
L
50
49
3
I/O
4
I/O
A
A
(con't.)
4L
3L
C
4L
5L
48
47
5
6
I/O
GND
A
A
D
2L
1L
6L
46
45
7
8
I/O
INT
V
A
E
CC
0L
7L
L
IDT70V07G
68-Pin PGA
Top View
BUSY
G68-1
44
43
9
10
I/O
GND BUSY
GND
F
0R
4
L
Pin Names
R/W
I/O
(4)
CE
OE
A
SEM
INT
BUSY
42
41
11
12
I/O
I/O
0L
M/S
(5)
G
0L
L
L
L
Left Port
1R
2R
- A
L
L
- I/O
R
L
14L
40
39
13
14
I/O
INT
7L
V
A
H
CC
0R
3R
R
GND
M/S
V
I/O
I/O
38
37
15
16
CC
Industrial and Commercial Temperature Ranges
A
A
R/W
I/O
CE
OE
A
SEM
INT
BUSY
1R
2R
4R
5R
J
0R
Right Port
0R
R
R
R
R
- A
R
- I/O
R
SEM
I/O
I/O
36
35
32
30
28
26
24
22
20
18
17
A
GND
A
OE
14R
A
A
A
A
11R
14R
3R
4R
7R
9R
K
7R
6R
7R
R
R
34
33
31
29
27
25
23
21
19
2943 drw 04
R/W
A
A
A
CE
A
A
A
N/C
10R
12R
13R
Chip Enable
Read/Write Enable
Output Enable
Data Input/Output
Semaphore Enable
Interrupt Flag
Busy Flag
Master or Slave Select
Power (3.3V)
Ground (0V)
L
Address
5R
6R
8R
R
R
,
Names
2943 tbl 01