HT49CV5 Holtek Semiconductor, HT49CV5 Datasheet - Page 17

• Manufacturer Part Number: HT49CV5
• Description: A/D
• Manufacturer: Holtek Semiconductor

Note:
Timer/Event Counter
Two timer/event counters (TMR0,TMR1) are imple-
mented in the microcontroller. The Timer/Event Counter
0 contains a 16-bit programmable count-up counter and
the clock may come from an external source or an inter-
nal clock source. An internal clock source comes from
f
grammable count-up counter and the clock may come
from an external source or an internal clock source. An
internal clock source comes from f
lected by option. The external clock input allows the
user to count external events, measure time intervals or
pulse widths, or to generate an accurate time base.
There are six registers related to the Timer/Event Coun-
ter 0 and Timer/Event Counter 1; TMR0H (0CH),
TMR0L (0DH), TMR0C (0EH) and the Timer/Event
Counter 1, TMR1H (0FH), TMR1L (10H), and TMR1C
(11H). Writing TMR0L (TMR1L) will only place the writ-
ten data to an internal lower-order byte buffer (8-bit) and
writing TMR0H (TMR1H) will transfer the specified data
Rev. 1.20
SYS
INTC0
INTC1
RMTC
MFIS
RTCC
PA
PAC
PB
PBC
PC
PCC
PD
PDC
PWM0
PWM1
SBCR
SBDR
RMT0
RMT1
ADR
ADCR
ACSR
VFDC
Register
. The Timer/Event Counter 1 contains a 16-bit pro-
* stands for warm reset
u stands for unchanged
x stands for unknown
(Power-on)
1111 1111
1111 1111
0110 0000
0000 0000
0000 0000
-000 0000
0000 000-
0000 -111
-000 -000
1111 --11
1111 --11
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
01-0 0-00
---0 0000
---0 -111
---- 1111
---- 1111
1--- --00
11-- ----
11-- ----
Reset
(Normal Operation)
SYS
WDT Time-out
/4 or 32768Hz se-
1111 1111
1111 1111
0110 0000
0000 0000
0000 0000
-000 0000
0000 000-
0000 -111
-000 -000
1111 --11
1111 --11
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
01-0 0-00
---0 0000
---0 -111
---- 1111
---- 1111
1--- --00
11-- ----
11-- ----
(Normal Operation)
17
RES Reset
1111 1111
1111 1111
0110 0000
0000 0000
0000 0000
-000 0000
0000 000-
0000 -111
-000 -000
1111 --11
1111 --11
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
01-0 0-00
---0 0000
and the contents of the lower-order byte buffer to
TMR0H (TMR1H) and TMR0L (TMR1L) registers, re-
spectively. The Timer/Event Counter 1/0 preload regis-
ter is changed by each writing TMR0H (TMR1H)
operations. Reading TMR0H (TMR1H) will latch the
contents of TMR0H (TMR1H) and TMR0L (TMR1L)
counters to the destination and the lower-order byte
buffer, respectively. Reading the TMR0L (TMR1L) will
read the contents of the lower-order byte buffer. The
TMR0C (TMR1C) is the Timer/Event Counter 0 (1) con-
trol register, which defines the operating mode, counting
enable or disable and an active edge.
The TM0 and TM1 bits define the operation mode. The
event count mode is used to count external events,
which means that the clock source is from an external
(TMR0, TMR1) pin. The timer mode functions as a nor-
mal timer with the clock source coming from the internal
selected clock source. Finally, the pulse width measure-
ment mode can be used to count the high or low level
duration of the external signal (TMR0, TMR1), and the
counting is based on the internal selected clock source.
---0 -111
---- 1111
---- 1111
1--- --00
11-- ----
11-- ----
RES Reset
1111 1111
1111 1111
0110 0000
0000 0000
0000 0000
-000 0000
0000 000-
0000 -111
-000 -000
1111 --11
1111 --11
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
01-0 0-00
---0 0000
---0 -111
---- 1111
---- 1111
11-- ----
11-- ----
---- --00
(HALT)
HT49RV5/HT49CV5
WDT Time-out
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuu-
0000 -111
-uuu -uuu
uuuu --uu
uuuu --uu
uu-u u-uu
---u uuuu
---u -uuu
---- uuuu
---- uuuu
(HALT)*
u--- --uu
uu-- ----
uu-- ----
April 14, 2006