HT49CV5 Holtek Semiconductor, HT49CV5 Datasheet - Page 18

• Manufacturer Part Number: HT49CV5
• Description: A/D
• Manufacturer: Holtek Semiconductor

In the event count or timer mode, the timer/event coun-
ter starts counting at the current contents in the
timer/event counter and ends at FFFFH. Once an over-
flow occurs, the counter is reloaded from the timer/event
counter preload register, and generates an interrupt re-
quest flag (T0F; bit 6 of INTC0, T1F; bit 4 of INTC1). In
the pulse width measurement mode with the values of
the TON and TE bits equal to 1, after the TMR0 (TMR1)
has received a transient from low to high (or high to low if
the TE bit is 0 ), it will start counting until the TMR0
(TMR1) returns to the original level and resets the TON.
Rev. 1.20
Bit No.
Bit No.
0~2
0~2
3
4
5
6
7
3
4
5
6
7
T0PSC0~
T0PSC2
T0ON
T1ON
Label
T0M0
T0M1
Label
T1M0
T1M1
T0E
T1E
T1S
Defines the prescaler stages.
T0PSC2, T0PSC1, T0PSC0=
000: f
001: f
010: f
011: f
100: f
101: f
110: f
111: f
Defines the TMR0 active edge of the timer/event counter:
In Event Counter Mode (T0M1,T0M0)=(0,1):
1:count on falling edge;
0:count on rising edge
In Pulse Width measurement mode (T0M1,T0M0)=(1,1):
1: start counting on the rising edge, stop on the falling edge;
0: start counting on the falling edge, stop on the rising edge
Enable/disable timer counting (0=disable; 1=enable)
Unused bit, read as 0
Defines the operating mode (T0M1, T0M0)
01= Event count mode (External clock)
10= Timer mode (Internal clock)
11= Pulse Width measurement mode (External clock)
00= Unused
Unused bit, read as 0
Defines the TMR1 active edge of the timer/event counter:
In Event Counter Mode (T1M1,T1M0)=(0,1):
1:count on falling edge;
0:count on rising edge
In Pulse Width measurement mode (T1M1,T1M0)=(1,1):
1: start counting on the rising edge, stop on the falling edge;
0: start counting on the falling edge, stop on the rising edge
Enable/disable timer counting (0= disable; 1= enable)
Defines the TMR1 internal clock source (0=f
Defines the operating mode (T1M1, T1M0)
01= Event count mode (External clock)
10= Timer mode (Internal clock)
11= Pulse Width measurement mode (External clock)
00= Unused
INT
INT
INT
INT
INT
INT
INT
INT
=f
=f
=f
=f
=f
=f
=f
=f
SYS
SYS
SYS
SYS
SYS
SYS
SYS
SYS
/2
/4
/8
/16
/32
/64
/128
TMR0C (0EH) Register
TMR1C (11H) Register
18
The measured result remains in the timer/event counter
even if the activated transient occurs again. In other
words, only 1-cycle measurement can be made until the
TON bit is set. The cycle measurement will continue as
long as it receives further transient pulse. In this opera-
tion mode, the timer/event counter begins counting not
according to the logic level but to the transient edges. In
the case of counter overflows, the counter is reloaded
from the timer/event counter register and issues an in-
terrupt request, as in the other two modes, i.e., the event
and timer modes.
Function
Function
SYS
/4; 1=32768Hz)
HT49RV5/HT49CV5
April 14, 2006