ST486DX ST Microelectronics, ST486DX Datasheet - Page 16

• Manufacturer Part Number: ST486DX
• Description: PROGRAMMING MANUAL
• Manufacturer: ST Microelectronics

ST486DX - SMM SOFTWARE CONSIDERATIONS
Unique to the SGS-Thomson CPU is that the CPU saves the previous EIP (CURRENT_IP), before
the SMI event, and the next EIP (NEXT_IP) that will be executed after exiting the SMI handler.
Upon execution of an RSM instruction, control is returned to the NEXT_IP. The value of the
NEXT_IP may need to be modified for restarting I/O instructions. This modification is a simple
move (MOV) of the CURRENT_IP value to the NEXT_IP location. Execution is then returned to
the I/O instruction, rather than to the instruction after the I/O instruction. Table 3-1 lists the SMM
header information needed to restart an I/O instruction. The restarting of I/O instructions may also
require modifications to the ESI, ECX and EDI depending on the instruction (see Section 3.6 for an
example.)
The EFLAGS, CR0 and DR7 registers are set to their reset values upon entry to the SMI handler.
Resetting these registers has implications for setting breakpoints using the debug registers. Break-
points can not be set prior to the SMI interrupt using debug registers. A debugger will only be able
to set a code breakpoint using INT 3 outside of the SMM handler. See Section 3.11 for restrictions
on debugging SMM code. Once the SMI has occurred and the debugger has control in SMM
space, the debug registers can be used for the remainder of the SMI handler execution.
If the S bit in the SMM header is set, the SMM entry was the result of an SMINT instruction.
Upon SMM entry, I/O trap information is stored in the SMM memory space header. This informa-
tion allows restarting of I/O instructions, as well as the easy emulation of I/O functions by the
SMM handler. This data is only valid if the instruction executing when the SMI occurred was an
I/O instruction. The three I/O Write fields (I/O Write Data, I/O Write Address and I/O Write Data
Size) are only valid when an I/O write was trapped.
Table 3 - 1
26
P
I
I/O Write Data Size
I/O Write Address
I/O Write Date
ESI or EDI
Bit
I/O Trap Information
REP INSx/OUTSx Indicator
IN, INSx, OUT, or OUTSx Indicator
Indicates size of data for the trapped I/O write
Address of the trapped I/O write
Data written during I/O trapped write
Value of appropriate index register before the trapped I/O instruction
0 = Current instruction has a REP prefix
1 = Current instruction does not have a REP prefix
0 = Current instruction performed an I/O READ
1 = Current instruction performed an I/O WRITE
01h = byte
03h = word
0fh = dword
Description
1 bit
1 bit
2 Bytes
2 Bytes
4 Bytes
4 Bytes
Size