ST486DX ST Microelectronics, ST486DX Datasheet - Page 24

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ST486DX

Manufacturer Part Number
ST486DX
Description
PROGRAMMING MANUAL
Manufacturer
ST Microelectronics
Datasheet
ST486DX - SMM SOFTWARE CONSIDERATIONS
3.7
Some system peripherals contain write-only ports. In a system that does power management, these
peripherals need to be powered off and then reinitialized when their functions are needed later. The
SGS Thomson SMM implementation makes it very easy to monitor the last value written to spe-
cific I/O ports. This process is known as shadowing. If the system can generate an SMI whenever
specific I/O addresses get accessed, the SMM routine can, transparently to the system, monitor the
port activity. The SMM header contains the address of the I/O write as well as the data. In addi-
tion, information is saved which indicates whether it is a byte, word or dword write. With this in-
formation, shadowing system write-only ports becomes trivial.
Some peripheral components contain registers that must be programmed in a specific order. If an
SMI interrupt occurs while an application is accessing this type of peripheral, the SMI routine must
be sure to reload the peripheral registers to the same stage before returning to normal mode. If the
SMM routine needs to access such a peripheral, the previous normal mode state must be restored.
The previous accesses that were shadowed by previous SMM calls can be used to reload the periph-
eral registers back to the stage where the application was interrupted. The application can then con-
tinue where it left off accessing the peripheral.
In a similar way, the SGS-Thomson SMM implementation allows the SMM routine to emulate the
function of peripheral components in software.
34
; A port read (INS or IN) instruction caused the
; chipset to generate an SMI instruction.
; Restore EDI from SMM header.
; A port write (OUTS or OUT) instruction caused the
; chipset to generate an SMI instruction.
; Restore ESI from SMM header.
out_instr:
common1:
I/O Port Shadowing and Emulation
bt
adc
test
jnz
mov
jmp
mov
ax,2
ecx,0
al,1 shl 1
out_instr
edi, dword ptr cs:[SMI_ESIEDI]
common1
esi, dword ptr cs:[SMI_ESIEDI]
;rep instruction?
;(result to Carry)
;test bit 1 to see
;if an OUTS or INS
;if so, increment ecx

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