ST486DX ST Microelectronics, ST486DX Datasheet - Page 22

• Manufacturer Part Number: ST486DX
• Description: PROGRAMMING MANUAL
• Manufacturer: ST Microelectronics

ST486DX - SMM SOFTWARE CONSIDERATIONS
full 4-GBytes of possible system memory without entering protected mode. Once the limits of a
segment register are set, the base can be changed by use of the MOV instruction.
An Interrupt Descriptor Table (IDT) needs to be set up in SMM memory before any interrupts or
exceptions occur. Once initialized, the SMI handler can execute calls, jumps, and other changes of
flow and will generate software interrupts and faults. The Interrupt Descriptor Table Register can
be loaded with an LIDT instruction to point to a small IDT in SMM memory that can handle the
possible interrupts and exceptions that might occur while in the SMM routine.
A stack should always be set up in SMM memory so that stack operations done within SMM do not
affect the system memory.
3.5
When in SMM mode there are instances where the program needs access to the system memory
that is overlapping with SMM memory. This need most commonly occurs when the SMM routine
is trying to save the entire memory image to disk before powering down the system. To access
main memory overlapping the SMM space (i.e., generate ADS# for memory MOV instructions
rather than SMADS#) set the MMAC bit in CCR1. The following code will enable and then disable
MMAC:
32
; SMM environment initialization example
;
;descriptor of 4GByte data segment for use by rsdc
seg4G
smm_idt
Accessing Main Memory Overlapped by SMM Memory
rsdc
rsdc
rsdc
rsdc
rsdc
lidt
mov
jmp
ds,cs:,seg4G
es,cs:,seg4G
fs,cs:,seg4G
gs,cs:,seg4G
ss,cs:,seg4G
cs:smm_idt
esp, smm_stack
continue_smm_code
dw
dw
db
db
db
db
dw
dw
dd
0ffffh
0
0
10010011B
8fh
0h
0
smm_idt_limit
smm_idt_base
;DS is a 4GByte segment, base=0
;ES is a 4GByte segment, base=0
;FS is a 4GByte segment, base=0
;GS is a 4GByte segment, base=0
;SS is a 4GByte segment, base=0
;load IDT base and limit for
;SMM’s IDT
; limit 4G
; base = 0
; base = 0
; data segment, DPL=0,P=1
; limit = 4G,
; base = 0
; segment register = 0