DSP56F826 Motorola, DSP56F826 Datasheet - Page 18

• Manufacturer Part Number: DSP56F826
• Description: 16-bit Digital Signal Processor
• Manufacturer: Motorola

Operating Conditions:
18
Output tri-state current high
Output High Voltage with IOH load
Output Low Voltage with IOL load
Output High Current
Output Low Current
Input capacitance
Output capacitance
V
Run
Wait
Stop
Low Voltage Interrupt
Low Voltage Interrupt Recovery Hysteresis
Power on Reset
DD
1.
puts 0.2V from rail; no DC loads; outputs unloaded. All ports configured as inputs; measured with all modules enabled.
PLL set to 80MHz out.
2.
less than 50 pF on all outputs. C
I
3.
4.
is ramping up, this signal remains active for as long as the internal 2.5V is below 1.5V typical no matter how long the
ramp up rate is. The internally regulated voltage is typically 100 mV less than V
at which time it self regulates.
DD
1
2
supply current
; measured with PLL and LVI enabled
Run (operating) I
Wait I
When V
Power
DD
–
4
on reset occurs whenever the internally regulated 2.5V digital supply drops below 1.5V typical. While power
DD
measured using external square wave clock source (f
drops below V
V
SSIO
3
Table 7. DC Electrical Characteristics (Continued)
Characteristic
DD
=V
measured using external square external square clock source (f
SS
= V
EI
SSA
L
= 20 pF on OSC2; all ports configured as inputs; OSC2 capacitance linearly affects wait
max value, an interrupt is generated.
= 0 V, V
DSP56F826 Preliminary Technical Data
DDIO
=3.0 to 3.6V, V
DD
= V
Symbol
DDA
C
osc
V
I
POR
V
V
I
C
I
V
I
OZH
OUT
OH
DD
OL
EIH
OH
OL
IN
EI
= 8MHz); all inpuyts 0.2V from rail; no DC loads;
= 2.25–2.75 V, T
V
DD
DD
Min
-300
-10
—
—
—
—
—
—
—
—
—
—
during ramp up until 2.5V is reached,
– 0.7
A
= –40 to +85 C, C
osc
= 4MHz) into XTAL. All in-
Typ
2.7
1.5
—
—
—
—
—
12
50
20
50
8
2
L
Max
TBD
TBD
TBD
TBD
0.4
2.0
10
—
—
—
—
—
2
50 pF, f
op
= 80 MHz
Unit
mA
mA
mA
mA
mV
pF
pF
V
V
V
V
A
A