DS2182A Dallas Semiconducotr, DS2182A Datasheet - Page 18

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DS2182A

Manufacturer Part Number
DS2182A
Description
T1 Line Monitor
Manufacturer
Dallas Semiconducotr
Datasheet
NOTES:
1. RFER transitions high during F-bit time if received framing pattern bit is in error. (Frame 12 F-bits in
2. RBV indicates received bipolar violation and transitions high when accused bit emerges from RSER.
3. RCL transitions high when 192 consecutive bits are 0; RCL transitions low upon reception of 12.5%
4. RLOS transitions high during F-bit time that caused an OOF event if auto-resync is enabled (RCR1.1
193S are ignored if RCR2.3 = 1.) Also, in 193E, RFER transitions high 1/2 bit-time before rising
edge of RMSYNC to indicate a CRC6 error for the previous multiframe.
If B8ZS is enabled, RBV will not report the 0 replacement code.
ones density.
= 0). Resync also occurs when loss of carrier is detected (RCL = 1) if RCR1.7 = 0. When RCR1.1 =
1, RLOS remains low until resync occurs, regardless of OOF or carrier loss flags. In this situation,
resync is initiated only when RCR1.0 transitions low-to-high or the
high.
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RST
pin transitions high-low-
DS2182A

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