KSZ8893-MQL Micrel Semiconductor, Inc., KSZ8893-MQL Datasheet - Page 43

• Manufacturer Part Number: KSZ8893-MQL
• Description: Integrated 3-Port 10/100 Managed Switch with PHYs
• Manufacturer: Micrel Semiconductor, Inc.

This function is useful in preventing the broadcast of unicast packets that could degrade the quality of the port in
applications such as voice over Internet Protocol (VoIP).
Configuration Interface
The KSZ8893MQL can operate as both a managed switch and an unmanaged switch.
In unmanaged mode, the KSZ8893MQL is typically programmed using an EEPROM. If no EEPROM is present,
the KSZ8893MQL is configured using its default register settings. Some default settings are configured via strap-
in pin options. The strap-in pins are indicated in the “KSZ8893MQL Pin Description and I/O Assignment” table.
I
With an additional I
“broadcast storm protection” and “rate control” without the need of an external processor.
For KSZ8893MQL I
120 (as defined in the KSZ8893MQL register map) with the exception of the “Read Only” status registers. After
the de-assertion of reset, the KSZ8893MQL sequentially reads in the configuration data for all 121 registers,
starting from register 0. The configuration access time (t
figure.
The following is a sample procedure for programming the KSZ8893MQL with a pre-configured EEPROM:
1. Connect the KSZ8893MQL to the EEPROM by joining the SCL and SDA signals of the respective devices.
2. Enable I
3. Check to ensure that the KSZ8893MQL reset signal input, RST_N (pin 67), is properly connected to the
4. Program the desired configuration data into the EEPROM.
5. Place the EEPROM on the board and power up the board.
6. Assert an active-low reset to the RST_N pin of the KSZ8893MQL. After reset is de-asserted, the
Note: For proper operation, check to ensure that the KSZ8893MQL PWRDN input signal (pin 36) is not asserted
during the reset operation. The PWRDN input is active low.
2
Micrel
November 2005
C Master Serial Bus Configuration
For the KSZ8893MQL, SCL is pin 97 and SDA is pin 98.
to “00”.
external reset source at the board level.
KSZ8893MQL begins reading the configuration data from the EEPROM. The KSZ8893MQL checks that the
first byte read from the EEPROM is “88”. If this value is correct, EEPROM configuration continues. If not,
EEPROM configuration access is denied and all other data sent from the EEPROM is ignored by the
KSZ8893MQL. The configuration access time (t
RST_N
SCL
SDA
2
C master mode by setting the KSZ8893MQL strap-in pins, PS[1:0] (pins 100 and 101, respectively)
2
2
C Master configuration, the EEPROM stores the configuration data for register 0 to register
C (“2-wire”) EEPROM, the KSZ8893MQL can perform more advanced switch features like
Figure 7. KSZ8893MQL EEPROM Configuration Timing Diagram
prgm
) is less than 15ms.
43
prgm
) is less than 15 ms, as depicted in the following
t
prgm
....
....
....
<15 ms
KSZ8893MQL/MQLI
M9999-111705