KSZ8893-MQL Micrel Semiconductor, Inc., KSZ8893-MQL Datasheet - Page 53

• Manufacturer Part Number: KSZ8893-MQL
• Description: Integrated 3-Port 10/100 Managed Switch with PHYs
• Manufacturer: Micrel Semiconductor, Inc.

PHY1 Register 29 (PHYAD = 0x1, REGAD = 0x1D): LinkMD Control/Status
PHY2 Register 29 (PHYAD = 0x2, REGAD = 0x1D): LinkMD Control/Status
Bit
15
14-13
12
11-9
8-0
PHY1 Register 31 (PHYAD = 0x1, REGAD = 0x1F): PHY Special Control/Status
PHY2 Register 31 (PHYAD = 0x2, REGAD = 0x1F): PHY Special Control/Status
Bit
15-6
5
4
3
2
1
0
Micrel
November 2005
Name
Vct_enable
Vct_result
Vct 10M Short
Reserved
Vct_fault_count
Name
Reserved
Polrvs
MDI-X status
Force_lnk
Pwrsave
Remote
Loopback
Reserved
R/W
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
(SC)
RO
RO
RO
RO
Description
Reserved
1 = polarity is reversed
0 = polarity is not reversed
1 = MDI-X
0 = MDI
1 = Force link pass
0 = Normal Operation
0 = Enable power saving
1 = Disable power saving
1 = Perform Remote loopback, as follows:
0 = Normal Operation
Reserved
Do not change the default value.
Description
1 = enable cable diagnostic. After VCT test
has completed, this bit will be self-cleared.
0 = indicate cable diagnostic test (if
enabled) has completed and the status
information is valid for read.
00 = normal condition
01 = open condition detected in cable
10 = short condition detected in cable
11 = cable diagnostic test has failed
1 = Less than 10 meter short
Reserved
Distance to the fault.
It’s approximately 0.4m*vct_fault_count[8:0]
Port 1 (reg. 26, bit 1 = ‘1’)
Port 2 (reg. 42, bit 1 = ‘1’)
Start: RXP1/RXM1 (port 1)
Loopback: PMD/PMA of port 1’s PHY
End: TXP1/TXM1 (port 1)
Start: RXP2/RXM2 (port 2)
Loopback: PMD/PMA of port 2’s PHY
End: TXP2/TXM2 (port 2)
53
Default
{(0x00),00}
0
0
0
1
0
0
Default
0
00
0
000
{0, (0x00)}
Reference
Reg. 26, bit 4
Reg. 42, bit 4
Reg 26, bit[6:5]
Reg 42, bit[6:5]
Reg. 26, bit 7
Reg. 42, bit 7
{(Reg. 26, bit
{(Reg. 42, bit
Reference
Reg. 31, bit 5
Reg. 47, bit 5
Reg. 30, bit 7
Reg. 46, bit 7
Reg. 26, bit 3
Reg. 42, bit 3
Reg. 26, bit 2
Reg. 42, bit 2
Reg. 26, bit 1
Reg. 42, bit 1
0), (Reg. 27,
bit[7:0])}
0), (Reg. 43,
bit[7:0])}
KSZ8893MQL/MQLI
M9999-111705