KSZ8893-MQL Micrel Semiconductor, Inc., KSZ8893-MQL Datasheet - Page 65

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KSZ8893-MQL

Manufacturer Part Number
KSZ8893-MQL
Description
Integrated 3-Port 10/100 Managed Switch with PHYs
Manufacturer
Micrel Semiconductor, Inc.
Datasheet
Register 19 (0x13): Port 1 Control 3
Register 35 (0x23): Port 2 Control 3
Register 51 (0x33): Port 3 Control 3
Bit
7-0
Register 20 (0x14): Port 1 Control 4
Register 36 (0x24): Port 2 Control 4
Register 52 (0x34): Port 3 Control 4
Bit
7-0
Note: Registers 19 and 20 (and those corresponding to other ports) serve two purposes:
Register 21 (0x15): Port 1 Control 5
Register 37 (0x25): Port 2 Control 5
Register 53 (0x35): Port 3 Control 5
Bit
7-4
3-2
1
0
Micrel
November 2005
1. Associated with the ingress untagged packets, and used for egress tagging.
2. Default VID for the ingress untagged or null-VID-tagged packets, and used for address lookup.
Name
[15:8]
Name
[7:0]
Name
Reserved
Default Tag
Default Tag
Limit Mode
Count IFG
Count Pre
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Port’s default tag, containing
Description
Port’s default tag, containing
Description
Reserved
Do not change the default values.
Ingress Limit Mode
These bits determine what kinds of frames are
limited and counted against ingress rate limiting.
= 00, limit and count all frames
= 01, limit and count Broadcast, Multicast, and
flooded unicast frames
= 10, limit and count Broadcast and Multicast
frames only
= 11, limit and count Broadcast frames only
Count IFG bytes
= 1, each frame’s minimum inter frame gap
(IFG) bytes (12 per frame) are included in
Ingress and Egress rate limiting calculations.
= 0, IFG bytes are not counted.
Count Preamble bytes
= 1, each frame’s preamble bytes (8 per
frame) are included in Ingress and Egress rate
limiting calculations.
= 0, preamble bytes are not counted.
7-5 : User priority bits
3-0 : VID[11:8]
7-0 : VID[7:0]
4 : CFI bit
65
Default
0x00
Default
0x01
Default
0x0
00
0
0
KSZ8893MQL/MQLI
M9999-111705

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