KSZ8893-MQL Micrel Semiconductor, Inc., KSZ8893-MQL Datasheet - Page 63
KSZ8893-MQL
Manufacturer Part Number
KSZ8893-MQL
Description
Integrated 3-Port 10/100 Managed Switch with PHYs
Manufacturer
Micrel Semiconductor, Inc.
Datasheet
1.KSZ8893-MQL.pdf
(106 pages)
- Current page: 63 of 106
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Register 17 (0x11): Port 1 Control 1
Register 33 (0x21): Port 2 Control 1
Register 49 (0x31): Port 3 Control 1
Bit
7
6
5
4
3
2-0
Micrel
November 2005
Name
User Priority
Ceiling
Port VLAN
membership
Sniffer Port
Receive Sniff
Transmit Sniff
Double Tag
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
= 1, Port is designated as sniffer port and will
transmit packets that are monitored.
= 0, Port is a normal port
= 1, All packets received on the port will be
marked as “monitored packets” and forwarded to
the designated “sniffer port”
= 0, no receive monitoring
= 1, All packets transmitted on the port will be
marked as “monitored packets” and forwarded to
the designated “sniffer port”
= 0, no transmit monitoring
= 1, All packets will be tagged with port default
tag of ingress port regardless of the original
packets are tagged or not
= 0, do not double tagged on all packets
= 1, if the packet’s “user priority field” is greater
than the “user priority field” in the port default tag
register, replace the packet’s “user priority field”
with the “user priority field” in the port default tag
register.
= 0, do not compare and replace the packet’s
‘user priority field”
Define the port’s egress port VLAN membership.
The port can only communicate within the
membership. Bit 2 stands for port 3, bit 1 stands
for port 2, bit 0 stands for port 1.
An ‘1’ includes a port in the membership.
An ‘0’ excludes a port from membership.
63
Default
0
0
0
0
0
111
KSZ8893MQL/MQLI
M9999-111705
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