IDT72V36102L10PF IDT, Integrated Device Technology Inc, IDT72V36102L10PF Datasheet - Page 23

• Manufacturer Part Number: IDT72V36102L10PF
• Description: IC FIFO 262KX18 10NS 120QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Vr

Specifications of IDT72V36102L10PF

• Function: Synchronous
• Memory Size: 4.7Mb (262k x 18)
• Data Rate: 100MHz
• Access Time: 10ns
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 120-TQFP, 120-VQFP
• Configuration: Dual
• Density: 4.5Mb
• Access Time (max): 6.5ns
• Word Size: 36b
• Organization: 64Kx36x2
• Sync/async: Synchronous
• Expandable: No
• Bus Direction: Bi-Directional
• Package Type: TQFP
• Clock Freq (max): 100MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Supply Current: 400mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 120
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V36102L10PF

NOTE:
1. t
IDT72V3682/72V3692/72V36102 3.3V CMOS SyncBiFIFO
16,384 x 36 x 2, 32,768 x 36 x 2 and 65,536 x 36 x 2
B0 - B35
A0 -A35
CLKB edge is less than t
SKEW1
CLKB
CLKA
W/RA
W/RB
CSA
ENA
ORA
MBB
MBA
CSB
ENB
IRB
is the minimum time between a rising CLKA edge and a rising CLKB edge for IRB to transition HIGH in the next CLKB cycle. If the time between the rising CLKA edge and rising
LOW
FIFO2 FULL
LOW
LOW
LOW
HIGH
LOW
Previous Word in FIFO2 Output Register
t
CLKH
SKEW1
t
CLK
, then IRB may transition HIGH one CLKB cycle later than shown.
t
Figure 14. IRB Flag Timing and First Available Write when FIFO2 is Full (FWFT Mode)
ENS2
t
CLKL
t
SKEW1
t
t
ENH
A
(1)
1
t
CLKH
TM
t
CLK
23
t
CLKL
2
Next Word From FIFO2
t
PIR
t
t
ENS2
ENS2
t
DS
COMMERCIAL TEMPERATURE RANGE
To FIFO2
Write
t
t
t
PIR
t
ENH
DH
ENH
4679 drw 17