IDT72V36102L10PF IDT, Integrated Device Technology Inc, IDT72V36102L10PF Datasheet - Page 25

• Manufacturer Part Number: IDT72V36102L10PF
• Description: IC FIFO 262KX18 10NS 120QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Vr

Specifications of IDT72V36102L10PF

• Function: Synchronous
• Memory Size: 4.7Mb (262k x 18)
• Data Rate: 100MHz
• Access Time: 10ns
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 120-TQFP, 120-VQFP
• Configuration: Dual
• Density: 4.5Mb
• Access Time (max): 6.5ns
• Word Size: 36b
• Organization: 64Kx36x2
• Sync/async: Synchronous
• Expandable: No
• Bus Direction: Bi-Directional
• Package Type: TQFP
• Clock Freq (max): 100MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Supply Current: 400mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 120
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V36102L10PF

NOTES:
1. t
2. FIFO2 Write (CSB = LOW, W/RB = LOW, MBB = LOW), FIFO2 read (CSA = LOW, W/RA = LOW, MBA = LOW). Data in the FIFO2 output register has been read from the FIFO.
NOTES:
1. t
2. FIFO1 Write (CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO1 read (CSB = LOW, W/RB = HIGH, MBB = LOW). Data in the FIFO1 output register has been read from the FIFO.
3. D = Maximum FIFO Depth = 16,384 for the IDT72V3682, 32,768 for the IDT72V3692, 65,536 for the IDT72V36102.
IDT72V3682/72V3692/72V36102 3.3V CMOS SyncBiFIFO
16,384 x 36 x 2, 32,768 x 36 x 2 and 65,536 x 36 x 2
CLKB
CLKA
CLKA
CLKB
ENA
CLKA edge is less than t
CLKB edge is less than t
ENB
AEA
ENA
AFA
ENB
SKEW2
SKEW2
is the minimum time between a rising CLKB edge and a rising CLKA edge for AEA to transition HIGH in the next CLKA cycle. If the time between the rising CLKB edge and rising
is the minimum time between a rising CLKA edge and a rising CLKB edge for AFA to transition HIGH in the next CLKA cycle. If the time between the rising CLKA edge and rising
[D-(Y1+1)] Words in FIFO1
SKEW2
SKEW2
t
ENS2
t
ENS2
Figure 17. Timing for AEA
, then AEA may transition HIGH one CLKA cycle later than shown.
, then AFA may transition HIGH one CLKA cycle later than shown.
Figure 18. Timing for AFA
t
t
SKEW2
ENH
t
X2 Words in FIFO2
ENH
t
PAF
(1)
AEA
AEA
AEA
AEA when FIFO2 is Almost-Empty (IDT Standard and FWFT Modes)
AFA
AFA
AFA
AFA when FIFO1 is Almost-Full (IDT Standard and FWFT Modes)
1
t
ENS2
TM
25
t
SKEW2
t
ENH
(D-Y1) Words in FIFO1
2
(1)
t
PAE
1
COMMERCIAL TEMPERATURE RANGE
(X2+1) Words in FIFO2
t
ENS2
2
t
PAF
t
ENH
t
PAE
4679 drw 20
4679 drw 21