LV24250LS Sanyo Semicon Device, LV24250LS Datasheet - Page 10

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LV24250LS

Manufacturer Part Number
LV24250LS
Description
1-Chip FM Tuner IC
Manufacturer
Sanyo Semicon Device
Datasheet

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(3). Register description (ON Contents of each Register)
Register 00h – CHIP_ID – Chip identify register (Read/Write)
Register 02h – RADIO_STAT – Radio station status (Read-Only)
Register 0Bh – RFCAP – RF Cap bank (Read/Write)
bit 7-0 :
Note : To abort the command, write any value in this register.
bit 7 :
bit 6-5 :
bit 4 :
bit 3-1
bit 0 :
For details, refer to Application note.
bit 7-0 :
When status (field strength, stereo/mono) changes, this bit is set.
If Interrupt of IRQ pin is enabled, Interrupt pin is set by following IPOL register condition.
This bit is cleared by register read. In stand-by mode (PW_RAD = 0), this bit is 1
RAD_IF
7
7
7
ID [7 : 0] : 8-bit chip ID.
LV24250LS : 15h
N/A
RAD_IF : Radio interrupt flag.
Note :
NA [1 : 0] : NA 0 fixed
MO_ST : Mono/stereo indicator
FS [2 : 0] : Fieldstrength :
SF5DB : Fieldstrength +5dB :
RFCAP [7 : 0] : RF Oscillator CAP bank
6
6
6
0 = no interrupt
1 = interrupt
0 = Forced monaural
1 = Normal (Receiving in stereo mode)
0 = Low field strength
7 = High field strength
0 = FS5dB no UP
1 = FS5dB UP
N/A
5
5
5
MO_ST
LV24250LS
4
4
4
RFCAP [7 : 0]
ID [7 : 0]
3
3
3
FS [2 : 0]
2
2
2
1
1
1
No.A1699-10/18
SF5DB
0
0
0
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