LV24250LS Sanyo Semicon Device, LV24250LS Datasheet - Page 9

• Manufacturer Part Number: LV24250LS
• Description: 1-Chip FM Tuner IC
• Manufacturer: Sanyo Semicon Device

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Digital interface specification (interface specification : reference)
(1). Characteristics of SDA and SCL bus line relative to the I
*Cb = Total capacitance of one bus line
(2). Register map (On Register Map)
Following is Sub address map of LV24250LS. Each register becomes 8-bit constitution.
R : Read only register
SCL clock frequency
Fall time of both SDA and SCL
Rise time of both SDA and SCL
High time of SCL
Low time of SCL
Hold time of STAT condition
Hold time of Data
Set-up time of STAT condition
Set-up time of STOP condition
Set-up time of Data
Bus free time between a STOP and
Capacitivie load for each bus line
SDA
Address
SCL
0Dh
1Dh
00h
02h
0Bh
0Eh
0Fh
10h
11h
19h
1Ah
1Bh
1Eh
1Fh
START Condition
Parameter
Tf
T HD;STA
CHIP_ID
RADIO_STAT
RFCAP
RADIO_CTRL1
RADIO_CTRL2
RADIO_CTRL3
TNPL
TNPH_STAT
REF_CLK_PRS
REF_CLK_DIV
REF_CLK_OFF
SCN_CTRL
TARGET_VAL_L
TARGET_VAL_H
R/W : Read and Write register
Tf
Register Name
Tr
T HD ; STA
T HD ; DAT
T SU ; STA
T SU ; STO
T SU ; DAT
Symbol
Tr
T HIGH
T LOW
F SCL
T BUF
Cb
Tf
Tr
T HD;DAT
LV24250LS
T LOW
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
T SU;DAT
min
Standard-mode
2
C bus interface
250
4.0
4.7
4.0
4.7
4.0
4.7
0
0
T HIGH
Chip ID
Status of Radio Station
RF Cap bank
Radio Control 1
Radio Control 2
Radio Control 3
Tune Position Low
Tune Position High and Status
Reference clock pre-scalar
Reference clock divider
Reference clock offset
Scan control
Target value Low
Target value High
max
1000
3.45
400
100
300
min
20+0.1Cb
20+0.1Cb
High_Speed-mode
Remark
100
0.6
1.3
0.6
0.6
0.6
1.3
0
0
Repeated START
T SU;STA
max
400
300
300
400
No.A1699-9/18
0.9
kHz
unit
pF
ns
ns
μs
μs
μs
μs
μs
μs
ns
μs
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