ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 44

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ds96-039wdsp

Manufacturer Part Number
ds96-039wdsp
Description
Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
Manufacturer
ETC-unknow
Datasheet
DSP1628 Digital Signal Processor
4 Hardware Architecture
Power Management Examples Without the PLL
The following examples show the more significant options for reducing the power dissipation. These are valid only
if the pllc register is set to disable and deselect the PLL (PLLEN = 0, PLLSEL = 0).
Standard Sleep Mode. This is the standard sleep mode. While the processor is clocked with a high-speed clock,
CKI, the alf register's AWAIT bit is set. Peripheral units may be turned off to further reduce the sleep power.
sleep:a0 = 0x8000
cont: .
Sleep with Slow Internal Clock. In this case, the ring oscillator is selected to clock the processor before the device
is put to sleep. This will reduce the power dissipation while waiting for an interrupt to continue program execution.
sleep:a0 = 0x8000
cont: .
Note that, in this case, the wake-up latency is determined by the period of the ring oscillator clock.
Sleep with Slow Internal Clock and Small-Signal Disabled. If the target device contains the small-signal clock
option, the clock input circuitry can be powered down to further reduce power. In this case, the slow clock must be
selected first.
sleep:a0 = 0x8000
cont: powerc = 0x00F0
Note that, in this case, the wake-up latency is dominated by the small-signal start-up period.
42
powerc = 0X00F0
do 1 {
alf = a0
nop
}
nop
nop
powerc = 0x0
powerc = 0x40F0
2*nop
do 1 {
alf = a0
nop
}
nop
nop
powerc = 0x00F0
2*nop
powerc = 0x0000
powerc = 0x40F0
2*nop
powerc = 0xC0F0
do 1 {
alf = a0
nop
}
nop
nop
powerc = 0x40F0
call xtlwait
2*nop
powerc = 0x0000
.
.
.
.
/* Turn off peripherals, core running with CKI */
/* Set alf register in cache loop if running from */
/* external memory with >1 wait state */
/* Stop internal processor clock, interrupt circuits */
/* active */
/* Needed for bedtime execution. Only sleep power */
/* consumed here until.... interrupt wakes up the device */
/* User code executes here */
/* Turn peripheral units back on */
/* Turn off peripherals and select slow clock */
/* Wait for it to take effect */
/* Set alf register in cache loop if running from */
/* external memory with >1 wait state */
/* Stop internal processor clock, interrupt circuits */
/* active */
/* Needed for bedtime execution. Reduced sleep power */
/* consumed here.... Interrupt wakes up the device */
/* User code executes here */
/* Select high-speed clock */
/* Wait for it to take effect */
/* Turn peripheral units back on */
/* Turn off peripherals and select slow clock */
/* Wait for it to take effect */
/* Turn off the small-signal input buffer */
/* Set alf register in cache loop if running from */
/* external memory with >1 wait state */
/* Stop internal processor clock, interrupt circuits */
/* active */
/* Needed for bedtime execution. Reduced sleep power */
/* consumed here.... Interrupt wakes up the device */
/* Clear XTLOFF, reenable small-signal */
/* Wait until small-signal is stable */
/* Select high-speed clock */
/* Wait for it to take effect */
/* Turn peripheral units back on */
(continued)
Lucent Technologies Inc.
February 1997

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