ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 64

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

DSP1628 Digital Signal Processor
5 Software Architecture
Table 39. alf Register
* The ebusy flag cannot be written by the user.
Table 40. mwait Register
If the EXM pin is high and the INT1 is low upon reset, the mwait register is initialized to all 1s (15 wait-states for all
external memory). Otherwise, the mwait register is initialized to all 0s (0 wait-states) upon reset.
Table 41. DSP1628 32-Bit JTAG ID Register
62
ROMCODE Letter
Field
Field
13—9
Field
Bit
Bit
RESERVED
ROMCODE
LOWPR
Bit
Bit
FLAGS
AWAIT
SECURE
PART ID
8
7
6
5
4
3
2
1
0
Field
CLOCK
Field
Value
AWAIT
RESERVED
EROM[3:0]
15
Reserved
15—12
ebusy*
nmns1
evenp
somef
somet
31
mns1
oddp
Flag
allf
allt
Value
Value
0x2A
A
0
—
01
11
—
1
0
1
0
0
0
1
LOWPR
14
B
1
ECCP BUSY
NOT-MINUS-ONE from BMU
MINUS-ONE from BMU
EVEN PARITY from BMU
ODD PARITY from BMU
SOME FALSE from BIO
SOME TRUE from BIO
ALL FALSE from BIO
ALL TRUE from BIO
ERAMHI[3:0]
SECURE
Nonsecure ROM option.
Secure ROM option.
Small-signal input clock option.
CMOS level input clock option.
DSP1628
Users ROMCODE ID:
The ROMCODE ID is the 9-bit binary value of the following expression:
(20 x value for first letter) + (value of second letter), where the values of the letters
are in the following table. For example, ROMCODE GK is (20 x 6) + (9) = 129
or 0 1000 0001.
C
2
11—8
Power-saving standby mode or standard sleep enabled.
Normal operation.
The internal DPRAM is addressed beginning at 0x0000 in X space.
The internal DPRAM is addressed beginning at 0xc000 in X space.
See table below.
(continued)
30
D
3
FLAGS
13—0
E
4
Use
—
F
5
IO[3:0]
7—4
CLOCK
G
29—28
6
H
7
Mask-Programmable Features
8
J
ERAMLO[3:0]
K
9
3—0
ROMCODE
Action
27—19
10 11 12 13 14 15 16 17 18 19
L
—
M
N
P
PART ID
18—12
R
Lucent Technologies Inc.
S
February 1997
T
U
0x03B
11—0
W
Y