ics9248-107 Integrated Device Technology, ics9248-107 Datasheet - Page 11

no-image

ics9248-107

Manufacturer Part Number
ics9248-107
Description
Frequency Timing Generator For Pentium Ii Systems
Manufacturer
Integrated Device Technology
Datasheet
Note:
1. LOW means outputs held static LOW as per latency requirement next page.
2. On means active.
3. PD# pulled Low, impacts all outputs including REF and 48 MHz outputs.
Power Management Features:
Power Management Requirements:
Note:
1. Clock on/off latency is defined in the number of rising edges of free running PCICLKs between the clock disable goes low/
2. Power up latency is when PWR_DWN# goes inactive (high) to when the first valid clocks are dirven from the device.
P
high to the first valid clock comes out of the device.
D
0
1
#
S
C
P
g i
D
P
L
n
U
O
#
O
l a
C
N
W
L
K
I
O
L
O
A
O
N
1
I P
0
W
n (
(
C
o p
r o
w
S
m
r e
3
L
g i
l a
O
V
O
n
o d
N
6 6
p o
W
l a
w
r e
S
) n
a t
t a
o i
e t
L
P
O
) n
O
C
N
W
I
P
L
N
C
O
O
. o
_ I
N
W
f o
F
P
L
r
C
s i
2
8 4
t a
3
L
m
R
I
n i
m
O
n e
C
M
O
E
a
g
S
N
L
. x
W
. F
H
y c
11
d e
K
z
g
s e
O
O
O
f o
F
c s
N
F
V
O
O
C
F
N
O
F
s
ICS9248-107

Related parts for ics9248-107