pca24s08a NXP Semiconductors, pca24s08a Datasheet - Page 11

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pca24s08a

Manufacturer Part Number
pca24s08a
Description
1024 ? 8-bit Cmos Eeprom With Access Protection
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PCA24S08A_1
Product data sheet
6.4.2.2 Access Protection Page (APP)
For example, when SB1 is a 1, the PB1 field can be written to any value by the system.
When the PB1 field is 11b, Block 1 can be written to by the system. Note that the state of
the SB1 bit does not affect whether or not Block 1 can be written.
There is no individual page Write Protection for any other block other than block 0 within
the device. Within the remaining blocks on the chip, access permissions are controlled on
a block basis (BP bits) or full chip basis (WP pin) only.
The serial port may be used to read and write the Access Protection Page (APP) and ID
Page using device access codes B8h and B9h instead of the normal value of A8h through
AFh (hex) that are used to access the rest of the EEPROM memory. The second byte of
write commands (the word address) should be in the range of 00h through 0Fh for the
APP page and 10h through 1Fh for the ID page. This coding is shown in
Reads and writes to these two pages may take place on a single byte basis only.
Multi-byte operations will be NACKed.
As an example, the bit encoding for a single byte read and write command are shown in
Figure
The PCA24S08A will acknowledge all device addresses of B8h or B9h. If the most
significant three its of the word address are not all 0 (indicating an address outside the
Access protection and ID pages), the chip will NACK the access.
Byte 0 through byte 7 of the APP contain 8 identical sets of access control fields (PBx and
SBx) for each of the eight blocks of memory on the chip, which operate according to
Table
system. Once a sticky bit is reset (written to zero) by the software, the byte containing it
can no longer be modified by the software until the next power cycle. These bytes can
always be read by the system.
Byte 8 contains another PB field (PBAP) as bit 0 and bit 1, and an additional sticky bit
(SBAP) as bit 7. The value of the PBAP bits controls read and write access to the last
7 bytes (byte 9 through byte 15) of the APP and all 16 bytes of the ID page according to
the encoding listed in
write from the serial port, when SBAP is HIGH. This byte can always be read by the
system. Bit 0 through bit 6 of this byte are stored in EEPROM memory and do not change
when the power is cycled or the PROT pin changes state.
Byte 9 contains the eight block 0 write protection bits (WPN) for each page within block 0.
Byte 10 emulates a coil detection feature to keep compatibility with existing software
controlling device.
Even though the PCA24S08A does not have the RFID capability of the AT24RF03C, it
gives a ‘coil non-detected’ information when the detection feature is initiated.
The detection feature uses the Detection Enable bit (DE) and the Detect Coil bit (DC). At
power-up, DE = 0 and DC = 1. Detection is enabled by setting DE bit at 1. Since no coil is
detected, DC is then automatically reset and equal to 0.
DE is a read/write bit; DC is a read-only bit. Attempts to write to this bit will be ignored.
4. When the sticky bit in one of these bytes is set, that byte can be written by the
11.
Section
Rev. 01 — 19 January 2010
6.4. The value of the PBAP bits can only be changed, a
1024 × 8-bit CMOS EEPROM with access protection
PCA24S08A
© NXP B.V. 2010. All rights reserved.
Figure
11.
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